GD25LE80CLEGR datasheet(19/68 Pages) GIGADEVICE

19 / 68 page

1.8V Uniform Sector

Dual and Quad Serial Flash

GD25LE80C

7.6

Read Data Bytes (READ) (03H)

The Read Data Bytes (READ) command is followed by a 3-Byte address (A23-A0), and each bit is latched-in on the rising

edge of SCLK. Then the memory content, at that address, is shifted out on SO, and each bit is shifted out, at a Max frequency

fR, on the falling edge of SCLK. The first Byte addressed can be at any location. The address is automatically incremented

to the next higher address after each Byte of data is shifted out. The whole memory can, therefore, be read with a single

Read Data Bytes (READ) command. Any Read Data Bytes (READ) command, while an Erase, Program or Write cycle is in

progress, is rejected without having any effects on the cycle that is in progress.

Figure 7. Read Data Bytes Sequence Diagram

7.7 Read Data Bytes at Higher Speed (Fast Read) (0BH)

The Read Data Bytes at Higher Speed (Fast Read) command is for quickly reading data out. It is followed by a 3-Byte

address (A23-A0) and a dummy Byte, and each bit is latched-in on the rising edge of SCLK. Then the memory content, at

that address, is shifted out on SO, and each bit is shifted out, at a Max frequency fC, on the falling edge of SCLK. The first

Byte addressed can be at any location. The address is automatically incremented to the next higher address after each

Byte of data is shifted out.

Figure 8. Read Data Bytes at Higher Speed Sequence Diagram

Command

0BH

CS#

SCLK

High-Z

9 10

28 29 30 31

23 22 21

24-bit address

MSB

34 35 36 37

38 39

Data Out1

42 43 44 45

46 47

Data Out2

CS#

SCLK

MSB

Dummy Byte

Command

03H

CS#

SCLK

High-Z

9 10

28 29 30 31 32

MSB

34 35 36 37

23 22 21

38 39

24-bit address

MSB

Data Out1

Data Out2

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