GD9FS1G6F2ADG datasheet(5/55 Pages) GIGADEVICE

5 / 55 page

GD9Fx1GxF2A

2. GENERAL DESCRIPTION

GigaDevice GD9Fx1G8F2A and GD9Fx1G6F2A are 1Gbit with spare 64Mbit capacity. A program operation can be

performed in typical tPROG on the 2176-byte page and an erase operation can be performed in typical tBERS on a

128K+8K-bytes block. Data in the data page can be read out at tRC cycle time per byte. The I/O pins serve as the ports

for address and data input/output as well as command input. The on-chip write controller automates all program and erase

functions including pulse repetition, where required, and internal verification and margining of data. GD9Fx1G8F2A and

GD9Fx1G6F2A

′s provide extended reliability of 100K program/erase cycles with ECC (Error Correcting Code).

2.1 Product List

PART NUMBER

ORGANIZATION

VCC RANGE

PACKAGE

GD9FU1G8F2AMG

128M x 8bit

2.7v ~ 3.6v

TSOP(I)-48

GD9FU1G6F2AMG

64M x 16bit

2.7v ~ 3.6v

TSOP(I)-48

GD9FU1G8F2ALG

128M x 8bit

2.7v ~ 3.6v

FBGA-63

GD9FU1G6F2ALG

64M x 16bit

2.7v ~ 3.6v

FBGA-63

GD9FU1G8F2ADG

128M x 8bit

2.7v ~ 3.6v

FBGA-48

GD9FU1G6F2ADG

64M x 16bit

2.7v ~ 3.6v

FBGA-48

GD9FS1G8F2AMG

128M x 8bit

1.7v ~ 1.95v

TSOP(I)-48

GD9FS1G6F2AMG

64M x 16bit

1.7v ~ 1.95v

TSOP(I)-48

GD9FS1G8F2ALG

128M x 8bit

1.7v ~ 1.95v

FBGA-63

GD9FS1G6F2ALG

64M x 16bit

1.7v ~ 1.95v

FBGA-63

GD9FS1G8F2ADG

128M x 8bit

1.7v ~ 1.95v

FBGA-48

GD9FS1G6F2ADG

64M x 16bit

1.7v ~ 1.95v

FBGA-48

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