INTERGER RF/IF DUAL PLL

S1M8821/22/23

17

•

Phase Detector Polarity

Depending on VCO characteristics, R16 bit should be set as follows :

VCO characteristics are positive like (1) : R16 HIGH

VCO characteristics are negative like (2) : R16 LOW

•

foLD (Pin10) Output Truth Table

— When the PLL is locked and a lock detect mode is selected, the foLD output is HIGH, with narrow pulses

LOW.

— Counter Reset mode resets R & N counters.

— The high speed lock mode sets the foLD output pin to be connected to ground with a low impedance

(

≤ 110

Ω).

RF R19

(RF LD)

IF R19

(IF LD)

RF R20

(RF fo)

IF R20

(IF fo)

foLD Output State

0000

Disabled (default LOW)

0100

IF Lock Detect

1000

RF Lock Detect

1100

RF and IF Lock Detect

0001

IF Reference Divider Output

0010

RF Reference Divider Output

0101

IF Programmable Divider Output

0110

RF Programmable Divider Output

0011

High Speed Lock mode

0111

IF Counter Reset

1011

RF Counter Reset

1111

RF and IF Counter Reset

(1)

(2)

VCO Input Voltage

VCO Characteristics