GPL16258VB datasheet(4/23 Pages) GENERALPLUS

4 / 23 page

GPL16258VB

Proprietary & Confidential

Nov. 24, 2016

Version: 1.0

Advanced Virtual 3D Game / ELA

SoC with

’nSP® 2.0

1. GENERAL DESCRIPTION

The Generalplus GPL16258VB is highly integrated system-on-a

chip

and

targets

cost-effective,

high

performance

micro-controller

solution

for

game,

education

and

learning

applications.

It embedded

’nSP® 2.0 (16-bit CPU developed by

Sunplus Technology) with 4KB I-cache, picture process unit (PPU),

TV encoder with QVGA or VGA output, 32-channel sound process

unit (SPU), SDRAM controller, ROM/SRAM/NOR FLASH/NAND

FLASH with ECC Memory controller, two channel DMA controller,

six-channel 16-bit timers, SD/MMC memory interface, USB device,

mono STN-LCD and TFT-LCD interface, interrupt controller, SPI

master controller, programmable I/O ports, 16-bit DAC for audio

playback, PLL, de-flicker, divider and embedded 12K*16-bit SRAM

and 4K*16 ROM.

By providing a complete set of common system peripherals, the

GPL16258VB minimizes overall system costs and eliminates the

need to configure additional components.

The GPL16258VB

provides not only the high-speed performance and low cost for a

system, but it also integrates several powerful tools into the

development system, such as development system with C

language, assembly compiler, linker, source debugger functions

and project management tools.

2. BLOCK DIAGRAM

SDRAM

ROM/RAM/

NOR FLASH

NAND FLASH

Controller

’nSP™ 2.0

With ICE

Deflicker

USB Transceiver

RTC

PLL

Regulator

16-bit DACx2

Signed divider

TV Encoder

System Control

SRAM 12K*16

2-ch DMA

USB

device

Controller

SPI Master

STN/TFT-LCD

SD/MMC Controller

6 Timers

ROM 4K*16

2K*16 I-Cache

PPU

32-ch SPU

Video-In

CMOS Sensor

3. FEATURES



’nSP® 2.0 16-bit CPU with frequency up to 96MHz.

 4K bytes I-cache.

 12k*16-bit SRAM for programming or LCD frame buffers.

 4K*16- bit ROM for boot code.

 Picture Process Unit (PPU)

 4 Text layers + 256 Sprites + 4096 Extended Sprites

 Virtual 3D Effect for text and sprite

 QVGA/VGA output

 Line base or Frame base operation

 De-flicker for TV output

 Up-to 4096 x 4096 Text Size

 Alpha-channel sprite

 Sound Process Unit (SPU)

 32 hardware PCM/ADPCM channels

 Built-in sound compressor

 Video-in/CMOS sensor interface supports CCIR601/CCIR656

standard.

 96 MHz SDRAM with maximum size 64M bytes for single chip

selection.

 Static memory controller. (ROM/SRAM/NOR FLASH/Page

Memory/NAND FLASH with ECC)

 Two-channel DMA controller.

 Mono and 16-gray STN-LCD controller.

 TFT-LCD controller which can be UPS051 (serial RGB),

UPS052 (serial RGB dummy), parallel RGB, i80 (8-bit/16-bit

system bus) I/F type, and CCIR601/CCIR656.

 29 sources Interrupt Controller.

 Universal Serial Bus (USB) 2.0 full speed compliant device

with built-in transceiver.

 Watchdog timer.

 32-bit by 32-bit signed divider

 Real-time clock.

 Six 16-bit timers.

 SD/MMC memory interface.

 SPI master interface.

 51 Programmable general I/O ports with pull-high/low control.

 Power manager.

 Built-in 3.0V to 1.8V Regulator.

 Low voltage reset.

 96MHz, 27MHz and 12MHz PLL.

 16-bit stereo DAC (2ch) for audio playback.

 TV encoder: supports NTSC/PAL output.

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