NM14F2KSLAXCL-3BNA datasheet(34/121 Pages) NANYA

tên linh kiện	NM14F2KSLAXCL-3BNA

Giải thích chi tiết về linh kiện	MCP Specification

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34 / 121 page

Version 1.6

Nanya Technology Corp.

05/2018

4Gb SLC NAND + 2Gb LPDDR2

NM148(F)2KSLAXCL/NM1482NSLAXCL

NTC Proprietary

Level: Property

Pass/fail status for each page programmed by the Auto Page Programming with Data Cache operation can be detected by the Status

Read operation.



I/O1 : Pass/fail of the current page program operation.



I/O2 : Pass/fail of the previous page program operation.

The Pass/Fail status on I/O1 and I/O2 are valid under the following conditions.



Status on I/O1: Page Buffer Ready/Busy is Ready State.

The Page Buffer Ready/Busy is output on I/O6 by Status Read operation or RY /

 pin after the 10h command



Status on I/O2: Data Cache Read/Busy is Ready State.

The Data Cache Ready/Busy is output on I/O7 by Status Read operation or RY /

 pin after the 15h command.

If the Page Buffer Busy returns to Ready before the next 80h command input, and if Status Read is done during

this Ready period, the Status Read provides pass/fail for Page 2 on I/O1 and pass/fail result for Page1 on I/O2

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