M440T1MV datasheet(20/26 Pages) STMICROELECTRONICS

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M440T1MV

20/26

Data Retention Mode

Should the supply voltage decay, the RAM will au-

tomatically deselect, write protecting itself when

VCC falls between VPFD (max), VPFD (min) win-

dow. All outputs become high impedance and all

inputs are treated as “Don't care.”

Note: A power failure during a WRITE cycle may

corrupt data at the current addressed location, but

does not jeopardize the rest of the RAM's content.

At voltages below VPFD (min), the memory will be

in a write protected state, provided the VCC fall

time is not less than tF. The M440T1MV may re-

spond to transient noise spikes on VCC that cross

into the deselect window during the time the de-

vice is sampling VCC.Therefore, decoupling of the

power supply lines is recommended. When VCC

drops below VSO, the control circuit switches pow-

er to the internal battery, preserving data and pow-

ering the clock. The internal energy source will

maintain data in the M440T1MV for an accumulat-

ed period of 5 years at 45°C. As system power ris-

es above VSO, the battery is disconnected, and the

power supply is switched to external VCC. Write

protection continues until VCC reaches VPFD (min)

plus tER (min). Normal RAM operation can resume

tER after VCC exceeds VPFD (max). Refer to Appli-

cation Note (AN1012) on the ST Web Site for more

information on battery life.

Figure 15. Power Down/Up Mode AC Waveforms

Table 12. Power Down/Up Trip Points DC Characteristics

Note: 1. Valid for Ambient Operating Temperature: TA = –15 to 75°C; VCC = 3.0 to 3.6V (except where noted).

2. All voltages referenced to VSS.

3. At 45°C, VCC = 0V.

Symbol

Parameter(1,2)

M440T1MV

Unit

Min

Typ

Max

VPFD

Power-fail Deselect Voltage

2.8

2.9

2.97

VSO

Battery Back-up Switchover Voltage

2.5

tDR

(3)

Expected Data Retention Time

YEARS

AI04792

VCC

INPUTS

OUTPUTS

DON'T CARE

HIGH-Z

tFB

tRB

VALID

RECOGNIZED

VPFD (max)

VPFD (min)

VSO

tREC

tDR

VSS

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