PI90SD1636AFD datasheet(8/15 Pages) PERICOM

8 / 15 page

PS8641

10/14/04

PI90SD1636A

SERDES Gigabit Ethernet Transceiver

Table 6. DC Electrical Characteristics TA = 0°C to +70°C, VCC = 3.15V to 3.45V

Symbol

Parameter

Min.

Typ.

Max.

Unit

VIH,TTL

TTL Input High Voltage Level, Guaranteed High Signal for All Inputs

5.5

VIL,TTL

TTL Input Low Voltage Level, Guaranteed Low Signal for All Inputs

0.8

VOH,TTL

TTL Output High Voltage Level, IOH = -400 mA

2.2

VCC

VOL,TTL

TTL Output Low Voltage Level, IOL = 1 mA

0.6

IIH,TTL

Input High Current, VIN = 2.4 V, VCC = 3.45 V

μA

IIL,TTL

Input Low Current, VIN = 0.4 V, VCC = 3.45 V

-600

ICC,TRX[1,2] Transceiver VCC Supply Current, TA = 25°C

220

Notes:

1. Measurement Conditions: Tested sending 1250 MBd PRBS 27-1 sequence from a serial Bit Error Rate Tester (BERT) with DOUT± outputs

terminated with 150Ω resistors to GND.

2. Typical values are at VCC = 3.3 volts.

Table 7. Transceiver Reference Clock Requirements TA = 0°C to +70°C, VCC = 3.15V to 3.45V

Symbol

Parameter

Min.

Typ.

Max.

Unit

Nominal Frequency (for gigabit Ethernet Compliance)

125

MHz

Ftol

Frequency Tolerance

-100

+100

ppm

Symm

Symmetry (Duty Cycle)

Peak-to-Peak Jitter

Table 8. Transmitter Timing Characteristics TA = 0°C to +70°C, VCC = 3.15V to 3.45V

Symbol

Parameter

Min.

Typ.

Max.

Unit

tsetup

Setup Time to Rising Edge of TX_CLK

1.5

thold

Hold Time to Rising Edge of TX_CLK

1.0

t_txlat[1]

Transmitter Latency

3.5

4.4

bits

Note:

1. The transmitter latency, as shown in Figure 4, is defined as the time between the latching in of the parallel data word (as triggered by the rising

edge of the transmit by clock, REFCLK) and the transmission of the first serial bit of that parallel word (defined by the rising edge of the first bit

transmitted).

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