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LM3310 bảng dữ liệu(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
tên linh kiện LM3310
Giải thích chi tiết về linh kiện  Step-up PWM DC/DC Converter with Integrated Op-Amp and Gate Pulse Modulation Switch
PDF  25 Pages
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nhà sản xuất  NSC [National Semiconductor (TI)]
Trang chủ  http://www.national.com
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Electrical Characteristics V
IN =2.5V and IL =0A (Continued)
Specifications in standard type face are for T
J = 25˚C and those with boldface type apply over the full Operating Tempera-
ture Range (T
J = −40˚C to +125˚C). Unless otherwise specified, VIN =2.5V and IL = 0A.
Symbol
Parameter
Conditions
Min(Note 5) Typ(Note 6) Max(Note 5)
Units
I
FREQ
FREQ Pin Current
FREQ = V
IN = 2.5V
2.7
13.5
µA
Electrical Characteristics V
IN =2.5V and AVIN =8V
Specifications in standard type face are for T
J = 25˚C and those with boldface type apply over the full Operating Tempera-
ture Range (T
J = −40˚C to +125˚C). Unless otherwise specified VIN =2.5V and AVIN = 8V.
Operational Amplifier
Symbol
Parameter
Conditions
Min(Note 5) Typ(Note 6) Max(Note 5)
Units
V
OS
Input Offset Voltage
Buffer configuration, V
O =
AV
IN/2, no load
5.7
15
mV
I
B
Input Bias Current (POS Pin) Buffer configuration, V
O =
AV
IN/2, no load (Note 9)
200
550
nA
V
OUT Swing
Buffer, R
L=2k
Ω,V
O min.
0.001
0.03
V
Buffer, R
L=2k
Ω,V
O max.
7.9
7.97
AV
IN
Supply Voltage
412
V
Is+
Supply Current
Buffer, V
O =AVIN/2, No Load
1.5
7.8
mA
I
OUT
Output Current
Source
90
138
195
mA
Sink
105
135
175
Electrical Characteristics V
IN =2.5V
Specifications in standard type face are for T
J = 25˚C and those with boldface type apply over the full Operating Tempera-
ture Range (T
J = −40˚C to +125˚C). Unless otherwise specified VIN =2.5V.
Gate Pulse Modulation
Symbol
Parameter
Conditions
Min(Note 5) Typ(Note 6) Max(Note 5)
Units
VFLK
VFLK Voltage Levels
Rising edge threshold
1.4
V
Falling edge threshold
0.4
VDPM
VDPM Voltage Levels
Rising edge threshold
1.4
V
Falling edge threshold
0.4
V
DD(TH)
V
DD Threshold
VGHM = 30V
2.8
3
3.3
V
VGHM = 5V
0.4
0.5
0.7
I
VFLK
VFLK Current
VFLK = 1.5V
4.8
11
µA
VFLK = 0.3V
1.1
2.5
I
VDPM
VDPM Current
VDPM = 1.5V
4.8
11
µA
VDPM = 0.3V
1.1
2.5
I
VGH
VGH Bias Current
VGH = 30V, VFLK High
59
300
µA
VGH = 30V, VFLK Low
11
35.5
R
VGH-VGHM
VGH to VGHM Resistance
20mA Current, VGH = 30V
14
28.5
Ω
R
VGHM-RE
VGHM to RE Resistance
20mA Current, VGH = VGHM
= 30V
27
55
R
VGHM(OFF)
VGH Resistance
VDPM is Low, VGHM = 2V
1.2
1.7
k
Ω
I
CE
CE Current
CE = 0V
7
11
16
µA
V
CE(TH)
CE Voltage Threshold
1.16
1.22
1.34
V
Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: Under normal operation the VC and CE pins may go to voltages above this value. The maximum rating is for the possibility of a voltage being applied to
the pin, however the VC and CE pins should never have a voltage directly applied to them.
Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA,
and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance of various layouts. The maximum allowable power dissipation
at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) −TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die
temperature, and the regulator will go into thermal shutdown.
Note 4: The human body model is a 100pF capacitor discharged through a 1.5k
Ω resistor into each pin per JEDEC standard JESD22-A114.
www.national.com
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