FS9912

Rev. 3.6

25/34

8-bit counter

Start

CTA[7:0]

Multiplex

16-bit Counter

with Load

Multiplex

Write

Databus[7:0]

CTA[23:8]

8-bit counter

CTB[7:0]

16-bit Counter

with Load

Multiplex

Write

Databus[7:0]

CTB[23:8]

Load

FCRST

reset

reset

Enable

DCK(1MHz)

CK

Enable

CK

CTB[7]

GT[2:0]

if FCM=00 Out=P1.2

else Out= DCK

FCRST

If FCM=10 Out=P1.2

else if FCM=01&Start=1 Out=P1.2

else if FCM=00&Start=1 Out=1

else Out=0

D

Load

CK

Q

Set

Rst

DCK

CTA=FFFFFFh

D

Load

CK

Q

Set

Rst

P1.2

FCRST

FCRST

STOP

If FCM=10 Out=1

else Out=~Stop

Start

1

If FCMODE=10 Out=CTA Overflow

else Out=Stop

Program Counter

Interrupt Signal

Under modes FCM=00 and 01, we can set Load=1 to load data into CTA [23:8] and simultaneously set

GT. When Load=0 and FCRST=1, CTA and CTB will start counting after the first positive edge signal from

input PT1.2. The counters will not stop counting until CTA overflows and after the first positive edge

signal from input PT1.2, and then the system will send out an interrupt signal. Therefore, we can count

the cycles of PT1.2 input signal to calculate the high-resolution frequency and duty cycle of the low

frequency input signal by the following calculation approach.

Under mode FSM=10, CTA and CTB start counting when FCRST=1. The counters will not stop counting

until CTA overflows, and then the system will send out an interrupt signal. The calculating flows and

methods are described as follows:

A.

Frequency Measurement Mode: FCM=00

a.

Load=1, FCRST=0

b.

Write 14h and 15h to CTA [23:8] to set initial value of CTAI.

c.

Set GT [2:0] to select the length of counter CTA. GT=000 sets CTA [23:8] as a 16-bit counter

and CTA [7] is as the clock input; CTA [23:0] is a 24-bit counter. GT=111 sets CTA [23:8] as a

16-bit counter and CTA [0] is as the clock input; {CTA [23:8], CTA[0]} is set as a 17-bit

counter.

d.

Gate Time = (1000000h-CTAI x 256) x 1us … if GT=000

e.

Set LOAD=0, FCRST=1, and P1.2 frequency starts measuring.

f.

Wait till positive edge of P1.2, then Start=1 and CTA and CTB start counting.

g.

Wait till CTA overflows and at the next positive edge of P1.2, then Start=0 and CTA and CTB

stop counting.

h.

When the CPU receives interrupt signal, the CPU will read CTA and CTB. Here CTA is the

reference clock counter, and CTB is the input clock counter

i.

Frequency of P1.2 is 1MHz x CTB/(CTA+CTAI). Go to “a” for next measurement.

B.

Duty Cycle Measurement Mode: FCM=01

a.

Load=1, FCRST=0

b.

Write 14h and 15h to CTA [23:8] to set initial value of CTAI.

c.

Set GT [2:0] to select the length of counter CTA. GT=000 sets CTA [23:8] as a 16-bit counter

and CTA [7] is as the clock input; CTA [23:0] is a 24-bit counter. GT=111 sets CTA [23:8] as a

16-bit counter and CTA [0] is as the clock input; {CTA [23:8], CTA [0]} is set as a 17-bit

counter.

d.

Gate Time = (1000000h-CTAI x 256) x 1us … if GT=000