¡ Semiconductor

MSM6791

PIN DESCRIPTION

Power supply

Ground

Oscillator

Oscillator

IC test. Use this pin by setting to ‘L’ level.

IC test. Use this pin by setting to ‘H’ level.

Read/write head address

Clock to take the serial address data in the internal register

Serial address data taken in the address register to the internal address counter

Clock to read and write the information of the data register. The internal operation starts by the

fall edge of RWCK. In a read mode, the data taken in XDIN is latched and it is output to the

DOUT pin. In a write mode, the DI/O output data of MSM6688/6788/6789 is taken in the DIN

pin of the DRAM. In addition, the internal address counter automatically increments by the fall

edge of RWCK and the address data output from A0 to A11.

Select a read mode and write mode.

DRAM control

DRAM address

DRAM control

DRAM control

Data input

Data output

Chip select data in connecting DRAM

By inputting a "L" level signal to each pin, up to 32M-bit of memory (8M-bit of memory for

each pin) can be controlled for four Pins.

These pins become the input pins to select the highest address in 16M-bit DRAM connection.

Set the connecting pattern of DRAM.

Symbol

GND

XT

XT

TEST

TEST

SAD

SAS

TAS

RWCK

WE

XWE

A0~A11

RAS

CAS1

CAS8

XDIN

DOUT

CS1

CS2

CS3

CS4

M1

M2

Type

–

–

I

O

I

I

I

I

I

I

I

O

O

O

O

I

O

I

I

Connecting

Mode

Mode 0

Mode 1

Mode 2

Mode 3

M2

L

L

H

H

M1

L

H

L

H

DRAM Connecting Pattern

1M-bit DRAM

¥ 1~8pcs. connectable

4M-bit DRAM

¥ 1~8pcs. connectable

(4M-bit DRAM

¥ 1pcs.) + (1M-bit DRAM ¥ 0~3pcs.) connectable

16M-bit DRAM

¥ 1~2pcs. connectable

Description