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STC15W201S bảng dữ liệu(PDF) 2 Page - List of Unclassifed Manufacturers

tên linh kiện STC15W201S
Giải thích chi tiết về linh kiện  Introduction of STC15W201S series MCU (In abundant supply)
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nhà sản xuất  ETC1 [List of Unclassifed Manufacturers]
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STC15W201S bảng dữ liệu(HTML) 2 Page - List of Unclassifed Manufacturers

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Power management mode: Slow-Down mode, Idle mode(all interrupt can wake up Idle mode), Stop/Power-
Down mode.
Timers which can wake up stop/power-down mode: have internal low-power special wake-up Timer.
Resource which can wake up stop/power-down mode are: INT0/P3.2, INT1/P3.3 (INT0/INT1, may be
generated on both rising and falling edges),
INT2/P3.6, INT3/P3.7, INT4/P3.0 ( INT2
/ INT3/INT4, only be generated on falling
edge); pins T0/T2(their falling edge can
wake up if T0/T2 have been enabled before
power-down mode, but no interrupts can be
generatetd); internal low-power special wake-
up Timer.
Two Timers/Counters----T0(are compatible with Timer0 of traditional 8051) and T2, T0/T2 all can
independently achieve external programmable clock output
Programmable clock output function(output by dividing the frequency of the internal system clock or the
input clock of external pin):
The speed of external programmable clock output of 5V MCU is also not more than 13.5MHz, because the
output speed of I/O port of STC15 series 5V MCU is not more than 13.5MHz.
The speed of external programmable clock output of 3.3V MCU is also not more than 8MHz, because the
output speed of I/O port of STC15 series 3.3V MCU is not more than 8MHz.
The Programmable clock output of T0 is on P3.5/T0CLKO (output by dividing the frequency of the internal
system clock or the input clock of external pin T0/P3.4)
The Programmable clock output of T2 is on P3.0/T2CLKO (output by dividing the frequency of the internal
system clock or the input clock of external pin T2/P3.1)
Two timers/counters in above all can be output by dividing the frequency from 1 to 65536.
The Programmable clock output of master clock is on P5.4/MCLKO, and its frequency can be divided into
MCLK/1, MCLK/2, MCLK/4.
/1, MCLK/2, MCLK/4.
, MCLK/2, MCLK/4.
The master clock can either be internal R/C clock or the external input clock or the external crystal
oscillator.
MCLK is the frequency of master clock. MCLKO is the output of master clock.
It is on MCLKO/P3.4 that the Programmable clock output of master clock of STC15 series 8-pin MCU
(such as STC15F101W series). However, it is on MCLKO/P5.4 that the Programmable clock output of master
clock of other STC15 series MCU including 16-pin or more than 16-pin MCU(such as STC15F2K60S2,
STC15W4K32S4 and so on)
Comparator, which support comparing by external pin CMP+ and CMP- or internal reference voltage and
generating output signal (its polarity can be configured) on CMPO pin can be used as 1 channel ADC or
brownout detect function.
One 15 bits Watch-Dog-Timer with 8-bit pre-scaler (one-time-enabled)
advanced instruction set, which is fully compatible with traditional 8051 MCU, have hardware multiplication /
division command.
14/6 common I/O ports are available, their mode is quasi_bidirectional/weak pull-up (traditional 8051 I/O
ports mode) after reset, and can be set to four modes: quasi_bidirectional/weak pull-up, strong push-pull/
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