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EPCQ32 bảng dữ liệu(PDF) 43 Page - Intel Corporation |
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EPCQ32 bảng dữ liệu(HTML) 43 Page - Intel Corporation |
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43 / 48 page ![]() The FPGA can program the EPCQ device in-system using the JTAG interface with the SFL. This solution allows you to indirectly program the EPCQ device using the same JTAG interface that is used to configure the FPGA. Related Information • Using the Intel FPGA Serial Flash Loader IP Core with the Quartus Prime Software • Intel FPGA ASMI Parallel IP Core User Guide • Intel FPGA Download Cable II User Guide • Intel FPGA Ethernet Cable • Configuration, Design Security, and Remote System Upgrades in Arria V Devices • Configuration, Design Security, and Remote System Upgrades in Cyclone V Devices • Configuration, Design Security, and Remote System Upgrades in Stratix V Devices 1.11. Pin Information The following lists the control pins on the EPCQ device: • Serial data 3 (DATA3) • Serial data 2 (DATA2) • Serial data 1 (DATA1) • Serial data 0 (DATA0) • Serial clock (DCLK) • Chip select (nCS) Related Information • Configuration, Design Security, and Remote System Upgrades in Arria V Devices • Configuration, Design Security, and Remote System Upgrades in Cyclone V Devices • Configuration, Design Security, and Remote System Upgrades in Stratix V Devices 1.11.1. Pin-Out Diagram for EPCQ16 and EPCQ32 Devices Figure 24. AS x1 and AS x4 Pin-Out Diagrams for EPCQ16 and EPCQ32 Devices nCS DATA1 VCC GND VCC VCC DCLK DATA0 1 2 3 4 8 7 6 5 nCS DATA1 DATA2 GND VCC DATA3 DCLK DATA0 1 2 3 4 8 7 6 5 AS x1 AS x4 1. Quad-Serial Configuration (EPCQ) Devices Datasheet CF52012 | 2018.06.01 Quad-Serial Configuration (EPCQ) Devices Datasheet 43 |
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