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NLSX0102FCT2G bảng dữ liệu(PDF) 2 Page - ON Semiconductor

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Figure 1. Block Diagram (1 I/O Line)
PU1
RPullup
10 k
W
VL
I/O VL
I/O VCC
VCC
One−Shot
Block
One−Shot
Block
PU2
Gate
Bias
N
RPullup
10 k
W
EN
EN
PIN ASSIGNMENT
Pins
Description
VCC
VCC Supply Voltage
VL
VL Supply Voltage
GND
Ground
EN
Output Enable, referenced to VL
I/O VCCn
I/O Port, referenced to VCC
I/O VLn
I/O Port, referenced to VL
FUNCTION TABLE
EN
Operating Mode
L
Hi−Z
H
I/O Buses Connected
MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Unit
VCC
High−side DC Supply Voltage
−0.5 to +7.0
V
VL
Low−side DC Supply Voltage
−0.5 to +7.0
V
I/O VCC
VCC−referenced DC Input / Output Voltage
−0.5 to +7.0
V
I/O VL
VL−referenced DC Input / Output Voltage
−0.5 to +7.0
V
VEN
Enable Control Pin DC Input Voltage
−0.5 to +7.0
V
II/O_SC
Short−Circuit Duration (I/O VL and I/O VCC to GND)
±50
Continuous
mA
II/OK
Input / Output Clamping Current (I/O VL and I/O VCC)
−50
VI/O < 0
mA
TSTG
Storage Temperature
−65 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.



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