MSM6404 datasheet(21/25 Pages) OKI

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MSM6404A/6404VS

¡ Semiconductor

Differences between MSM6404A and MSM6404VS (PIGGYBACK)

Item

MSM6404A

MSM6404VS (Piggyback)

Ports P0, 1, 3 are set to "1" and ports P2, 4,

5, 6, 7, 8 are reset to "0" directly by the reset

input signal.

Ports P0, 1, 3 are set to "1" and ports P2, 4,

5, 6, 7, 8 are initialized during reset cycle.

After being reset, the timer continues to stop

until data is set in it.

It is undefined whether the timer starts or

not after being reset. Therefore, the timer

should be initialized by software.

Serial out F/F (SOF/F) is set to "0" after being

reset.

It is undefined whether serial out F/F

(SOF/F) is "0" or "1" after being reset.

Therefore the serial out F/F should be

initialized by software.

Port

initialization

during reset

2. Timer

operation

3. Shift register

Internal clock

Port

input/output

timing

Input

Data are input

at this time.

Input

Data are input

at this time.

Internal clock

Synchronized

with falling edge

Data are output

at this time.

Data are output

at this time.

Output

TTL FO = "1"

(IOL = 1.6 mA @ 0.4 V)

LSTTL FO = "1"

(IOL = 0.4 mA @ 0.4 V)

Port

input/output

characteristics

P2.0-3

VDD

VDD VDD

TTL compatible input

CMOS input

P0.0-P8.3

(Except P2.0-3)

Up to 4 Kbytes

Up to 8 Kbytes accessible

Available ROM

capacity

Not available

Available

LJP a13, LCAL a13

instruction

Internal clock

Output

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