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TMP141 bảng dữ liệu(PDF) 12 Page - Texas Instruments

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tên linh kiện TMP141
Giải thích chi tiết về linh kiện  Digital Out Temperature Sensor with Single-Wire SensorPath Bus
PDF  19 Pages
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Trang chủ  http://www.ti.com
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TMP141 bảng dữ liệu(HTML) 12 Page - Texas Instruments

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TMP141
SBAS347 − MARCH 2005
www.ti.com
12
Register Ah: Temperature Control (Read/Write)
Bits 15−2: Reserved. These bits read as ‘0’.
Bit 1, Enable Sensor (EN_S): Default is ‘0’, which is the
disabled state. In addition to setting this bit, the enable bit
in register 5 must also be set in order to measure
temperature.
Bit 0, Attention Enable (AT_E): Default is disabled.
When this bit is set, and the sensor is enabled (bit 1), the
TMP141 will generate Attention Requests. If enabled, an
Attention Request will be generated when a bit is set in the
Device Status register (register 4). See Figure 5 for the
details on the conditions for generating an Attention
Request.
Note: A bus error always attempts to generate an Attention
Request.
(For
more
information
on
the
Attention
Request
conditions, see the flowcharts in Figure 4 and Figure 5,
and the information on Exception Handling on page 14.)
The rules for generating an Attention Request are
different, depending on whether it was caused by a bus
error or a temperature conversion. A bus error always
attempts to generate an Attention Request, whereas a
conversion or a conversion overrun has several conditions
that may prevent the assertion of Attention Request.
These differences are illustrated in Figure 4 and Figure 5.
Register 20h: Conversion Rate (Read/Write)
The conversion rate is controlled by both the low-power bit
in the Device Control register, and the Conversion Rate
setting in the Conversion Rate register. This register is
device-specific,
and therefore not defined by the
SensorPath specification. The conversion rate for a given
application is chosen based on system requirements and
limitations, such as the thermal response time of the
system (including the TMP141).
Table 4. Conversion Time Settings
LOW-POWER
MODE
(register 5, bit 2)
CONVERSION
RATE SETTING
(register 20h, bits
1−0 binary)
TYPICAL
CONVERSION
TIME
(ms)
0
00
64
1
00
96
0
01
96
1
01
382
0
10
190 (default)
1
10
766
0
11
382
1
11
1532



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