5

ICS950401

0499C—11/01/04

Byte0: Functionality and Frequency Select

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Notes:

1. Write Disable. A '1' written to this bit after a '1' is written to BYTE0/bit 0 will permanently disable writing to I2C until

the part is powered off. Once the clock generator has been write disabled, the SMBus controller should still accept and

acknowledge subsequent write cycles but it should not modify any of the registers.

2.

3. A '1' written to this bit after power-up will enable writing to I2C. Subsequent '0's written to this bit will disable

modification of all registers except this single bit. When a '1' is written to Byte 0 Bit 7, all modification is permanently

disabled until the device power cycles. Block write transactions to the interface will complete, however unless the

interface has been previously unlocked, the writes will have no effect. The effect of writing to this bit does not take effect

until the subsequent block write command.

4. Clarification on frequency select on power-up:

i. Upon power-up, Byte0, bits (5:1) [FS(4:0)] are set to default hardware settings.

ii. A '1' is written to Byte0, bit 0 to enable software control.

iii. Every time Byte0 is written, frequency input defaults will be affected.

iv. If a '0' is written to Byte0, bit0, the software control is disabled. Disabling software control does not cause the

contents of Byte0

to default back to hardware setting for FS(4:0).

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