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MM74HC00 Rev. 1.3.0

February 2008

MM74HC00

Quad 2-Input NAND Gate

Features

General Description

The MM74HC00 NAND gates utilize advanced silicon-

gate CMOS technology to achieve operating speeds

similar to LS-TTL gates with the low power consumption

of standard CMOS integrated circuits. All gates have

buffered outputs. All devices have high noise immunity

and the ability to drive 10 LS-TTL loads. The 74HC logic

family is functionally as well as pin-out compatible with

the standard 74LS logic family. All inputs are protected

from damage due to static discharge by internal diode

Ordering Information

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

Connection Diagram

Pin Assignments for DIP, SOIC, SOP and TSSOP

Top View

Logic Diagram

Order Number

Package

Number

Package Description

MM74HC00M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

MM74HC00SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC00MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC00N

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide