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INA84C030 bảng dữ liệu(PDF) 2 Page - Integral Corp.

tên linh kiện INA84C030
Giải thích chi tiết về linh kiện  8-BIT MICROCONTROLLERS WITH OCD AND VST
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nhà sản xuất  INTEGRAL [Integral Corp.]
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INA84C030 bảng dữ liệu(HTML) 2 Page - Integral Corp.

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INA 84C640/030
Korzhenevskogo 12, Minsk, 220064, Republic of
Belarus
Fax:
+375 (17) 278 28 22,
Phone: +375 (17) 278 07 11, 277 24 70, 277 24 61,
277 69 16
E-mail: belms@belms.belpak.minsk.by
URL: www.bms.by
PIN DESCRIPTION
PIN
SYMBOL
DESCRIPTION
1
DP0.0/Tdac
Derivative Port 0: quasi-bidirectional I/O line or 14-bit DAC PWM
2
DP0.1/PWM1
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
3
DP0.2/PWM2
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
4
DP0.3/PWM3
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
5
DP0.4/PWM4
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
6
DP0.5/PWM5
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
7
P1.0/VHF1
Port 1: quasi-bidirectional I/O lines
8
P1.1/VHF3
Port 1: quasi-bidirectional I/O lines
9
P1.7/AFC
Derivative Port 1: quasi-bidirectional I/O line or comporator input with 3-bit DAC
10
P1.2/VHF
Port 1: quasi-bidirectional I/O lines
11
P1.3/VTR
Port 1: quasi-bidirectional I/O lines
12
P1.4/AV
Port 1: quasi-bidirectional I/O lines
13
P0.0
Port 0: quasi-bidirectional I/O port
14
P0.1
Port 0: quasi-bidirectional I/O port
15
P0.2
Port 0: quasi-bidirectional I/O port
16
P0.3
Port 0: quasi-bidirectional I/O port
17
P0.4
Port 0: quasi-bidirectional I/O port
18
P0.5
Port 0: quasi-bidirectional I/O port
19
P0.6
Port 0: quasi-bidirectional I/O port
20
P0.7/Mdstr
Port 0: quasi-bidirectional I/O port
21
VSS
Ground
22
DP1.6/VOW1
Derivative Port 1: quasi-bidirectional I/O lines or character video output
23
DP1.5/VOW2
Derivative Port 1: quasi-bidirectional I/O lines or character video output
24
VOW3
Character video output of OSD
25
Fbl
Blanking output
26
HSYNC
Horizontal synchronous signal input
27
VSYNC
Vertical synchronous signal input
28
DOSC
Connection to RC oscillator of OSD clock
29
IDENT
Direct testable pin and event counter input
30
Test
Control input for testing and emulation mode. Ground for normal operation
31
Xlat 1
Oscillator output or input terminal for system clock
32
Xlat 2
Oscillator output or input terminal for system clock
33
Reset N\
Initialise input, active LOW
34
DP1.4/Sudl
Derivative Port 1: quasi-bidirectional I/O lines
35
Int/Rmot
External interrupt or direct testable
36
DP1.3/Sndo
Derivative Port 1: quasi-bidirectional I/O lines
37
DP1.2/Effect
Derivative Port 1: quasi-bidirectional I/O lines
38
DP1.1/P/S
Derivative Port 1: quasi-bidirectional I/O lines
39
DP0.7/SCL
Derivative open drain I/O port or I
2C-bus clock line
40
DP0.6/SDA
Derivative open drain I/O port or I
2C-bus data line
41
DP1.0/Stdby
Derivative Port 1: quasi-bidirectional I/O lines
42
VDD
Power supply



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