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74FCT163374APVG8 bảng dữ liệu(PDF) 6 Page - Integrated Device Technology |
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74FCT163374APVG8 bảng dữ liệu(HTML) 6 Page - Integrated Device Technology |
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6 / 7 page ![]() 6 INDUSTRIALTEMPERATURERANGE IDT74FCT163374A/C 3.3V CMOS 16-BIT REGISTER (3-STATE) Pulse Generator R T D.U.T. V CC VIN C L VOUT 50pF 500 Ω 500 Ω Open GND 6v 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL tSU tH tREM tSU tH PRESET CLEAR CLOCK ENABLE ETC. HIGH-LOW-HIGH PULSE LOW-HIGH-LOW PULSE tW 1.5V 1.5V SAME PHASE INPUT TRANSITION 3V 1.5V 0V 1.5V VOH tPLH OUTPUT OPPOSITE PHASE INPUT TRANSITION 3V 1.5V 0V tPLH tPHL tPHL VOL CONTROL INPUT 3V 1.5V 0V 3V 0V OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH 6V SWITCH GND VOL 0.3V 0.3V tPLZ tPZL tPZH tPHZ 3V 0V 1.5V 1.5V ENABLE DISABLE VOH T EST CI RCU I T S AN D WAV EFORM S Propagation Delay Test Circuits for All Outputs Enable and Disable Times Set-up, Hold, and Release Times Pulse Width Test Switch Open Drain Disable Low 6V Enable Low Disable High GND Enable High All Other Tests Open SWI TCH POSI T I ON DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 3. if VCC is below 3V, input voltage swings should be adjusted not to exceed VCC. |
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