tm

May 2007

©1997 Fairchild Semiconductor Corporation

www.fairchildsemi.com

74VHCT573A Rev. 1.3

74VHCT573A

Octal D-Type Latch with 3-STATE Outputs

Features

outputs

General Description

The VHCT573A is an advanced high speed CMOS octal

latch with 3-STATE output fabricated with silicon gate

CMOS technology. It achieves the high speed operation

similar to equivalent Bipolar Schottky TTL while main-

taining the CMOS low power dissipation. This 8-bit

D-type latch is controlled by a Latch Enable input (LE)

and an Output Enable input (OE). When the OE input is

HIGH, the eight outputs are in a high impedance state.

Protection circuits ensure that 0V to 7V can be applied to

voltage. This device can be used to interface 3V to 5V

systems and two supply systems such as battery back

up. This circuit prevents device destruction due to mis-

matched supply and input voltages.

Note:

1. Outputs in OFF-State

Ordering Information

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the

ordering number. Pb-Free package per JEDEC J-STD-020B.

Connection Diagram

Pin Description

Order Number

Package

Number

Package Description

74VHCT573AM

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74VHCT573ASJ

M20D

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHCT573AMTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,

4.4mm Wide

Pin Names

Description

Data Inputs

LE

Latch Enable Input

OE

3-STATE Output Enable Input

3-STATE Outputs