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LTC2636 bảng dữ liệu(PDF) 21 Page - Analog Devices |
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LTC2636 bảng dữ liệu(HTML) 21 Page - Analog Devices |
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21 / 24 page ![]() LTC2636 21 Rev D For more information www.analog.com OPERATION 2636 F04 INPUT CODE (b) OUTPUT VOLTAGE NEGATIVE OFFSET 0V 0V 2,048 0 4,095 INPUT CODE OUTPUT VOLTAGE (a) VREF = VCC VREF = VCC (c) INPUT CODE OUTPUT VOLTAGE POSITIVE FSE Figure 4. Effects of Rail-to-Rail Operation On a DAC Transfer Curve (Shown for 12 Bits). (a) Overall Transfer Function (b) Effect of Negative Offset for Codes Near Zero (c) Effect of Positive Full-Scale Error for Codes Near Full-Scale Rails vs. Output Current” in the Typical Performance Characteristics section. The amplifier is stable driving capacitive loads of up to 500pF. Rail-to-Rail Output Considerations In any rail-to-rail voltage output device, the output is lim- ited to voltages within the supply range. Since the analog output of the DAC cannot go below ground, it may limit for the lowest codes as shown in Figure 4b. Similarly, limiting can occur near full-scale when the REF pin is tied to VCC. If VREF = VCC and the DAC full-scale error (FSE) is positive, the output for the highest codes limits at VCC, as shown in Figure 4c. No full-scale limiting can occur if VREF is less than VCC–FSE. Offset and linearity are defined and tested over the region of the DAC transfer function where no output limiting can occur. Board Layout The PC board should have separate areas for the analog and digital sections of the circuit. A single, solid ground plane should be used, with analog and digital signals care- fully routed over separate areas of the plane. This keeps digital signals away from sensitive analog signals and minimizes the interaction between digital ground currents and the analog section of the ground plane. The resistance from the LTC2636 GND pin to the ground plane should be as low as possible. Resistance here will add directly to the effective DC output impedance of the device (typically 0.1Ω). Note that the LTC2636 is no more susceptible to this effect than any other parts of this type; on the con- trary, it allows layout-based performance improvements to shine rather than limiting attainable performance with excessive internal resistance. Another technique for minimizing errors is to use a sepa- rate power ground return trace on another board layer. The trace should run between the point where the power supply is connected to the board and the DAC ground pin. Thus the DAC ground pin becomes the common point for analog ground, digital ground, and power ground. When the LTC2636 is sinking large currents, this current flows out the ground pin and directly to the power ground trace without affecting the analog ground plane voltage. It is sometimes necessary to interrupt the ground plane to confine digital ground currents to the digital portion of the plane. When doing this, make the gap in the plane only as long as it needs to be to serve its purpose and ensure that no traces cross over the gap. |
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