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AM6548 bảng dữ liệu(PDF) 2 Page - Texas Instruments

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tên linh kiện AM6548
Giải thích chi tiết về linh kiện  Sitara Processors
PDF  299 Pages
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nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
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AM6548 bảng dữ liệu(HTML) 2 Page - Texas Instruments

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AM6548, AM6528, AM6546
AM6526, AM6527
SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527
Device Overview
Copyright © 2017–2018, Texas Instruments Incorporated
Ability to Auto-Switch Key-Material Based on
Incoming Data Stream
– Supports Cryptographic Cores
– AES – 128/192/256 Bits Key Sizes
– 3DES – 56/112/168 Bits Key Sizes
– MD5, SHA1
– SHA2 – 224/256/384/512
– DRBG with True Random Number Generator
– PKA (Public Key Accelerator) to Assist in
RSA/ECC Processing
– DMA Support
• Debugging Security
– Secure Software Controlled Debug Access
– Security Aware Debugging
• Trusted Execution Environment (TEE) Supported
– Arm TrustZone® Based TEE
– Extensive Firewall Support for Isolation
– Secure DMA Path and Interconnect
– Secure Watchdog/Timer/IPC
• Secure Storage Support
• On-the-Fly Encryption and Authentication Support
for OSPI Interface
• Networking Security Support for Data (Payload)
Encryption/Authentication via Packet Based
Hardware Cryptographic Engine
• Security Co-Processor (DMSC) for Key and
Security Management, with Dedicated Device
Level Interconnect for Security
SoC Services:
• Device Management Security Controller (DMSC)
– Centralized SoC System Controller
– Manages System Services Including Initial Boot,
Security, Safety and Clock/Reset/Power
Management
– Power Management Controller for Active and
Low Power Modes
– Communication with Various Processing Units
over Message Manager
– Simplified Interface for Optimizing Unused
Peripherals
– Tracing and Debugging Capability
• Sixteen 32-Bit General-Purpose Timers
• Two Data Movement and Control Navigator
Subsystems (NAVSS)
– Ring Accelerator (RA)
– Unified DMA (UDMA)
– Up to 2 Timer Managers (TM) (1024 Timers
Each)
Multimedia:
• Display Subsystem
– Two Fully Input-Mapped Overlay Managers
Associated with Two Display Outputs
– One Port MIPI® DPI Parallel Interface
– One Port OLDI
• Graphics Processing Unit (GPU)
• One Camera Serial Interface-2 (MIPI CSI-2)
• One Port Video Capture: BT.656/1120 (No
Embedded Sync)
High-Speed Interfaces:
• One Gigabit Ethernet (CPSW) Interface Supporting
– RMII (10/100) or RGMII (10/100/1000)
– IEEE1588 (2008 Annex D, Annex E, Annex F)
with 802.1AS PTP
– Audio/Video Bridging (P802.1Qav/D6.0)
– Energy-Efficient Ethernet (802.3az)
– Jumbo Frames (2024 bytes)
– Clause 45 MDIO PHY Management
• Two PCI-Express® Revision 3.1 Subsystems (2)
– Supports Gen3 (8.0GT/s) Operation
– Two Independent 1-lane, or a Single 2-lane Port
– Support for Concurrent Root-Complex and/or
End-Point Operation
• USB 3.1 Dual-Role Device Subsystem (2)
– One Enhanced SuperSpeed Gen1 Port
– One USB 2.0 Port
– Each Port Independently Configurable as USB
Host, USB Peripheral, or USB Dual-Role Device
General Connectivity:
• 6× Inter-Integrated Circuit (I2C) Ports
• 5× Configurable UART/IrDA/CIR Modules
• Two Simultaneous Flash Interfaces Configured
– Two OSPI™ Flash Interfaces
– or Hyperbus™ and OSPI1 Flash Interface
• 2× 12-Bit Analog-to-Digital Converters (ADC)
– Up to 4 Msamples/s
– Eight Multiplexed Analog Inputs
• 8× Multichannel Serial Peripheral Interfaces
(MCSPI) Controllers
– Two with Internal Connections
– Six with External Interfaces
• General-Purpose I/O (GPIO) Pins
Control Interfaces:
• 6× Enhanced High Resolution Pulse-Width
Modulator (EHRPWM) Modules
• One Enhanced Capture (eCAP) Module
• 3× Enhanced Quadrature Encoder Pulse (eQEP)
Modules
Automotive Interfaces:
• 2× Modular Controller Area Network (MCAN)
Modules with Full CAN-FD Support
Audio Interfaces:
• 3× Multichannel Audio Serial Port (MCASP)
Modules
Media and Data Storage:
• 2× MultiMedia Card/Secure Digital (MMC/SD)
Interfaces
Simplified Power Management:



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