công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

ICS831721I bảng dữ liệu(PDF) 6 Page - Integrated Device Technology

tên linh kiện ICS831721I
Giải thích chi tiết về linh kiện  Differential Clock/Data Multiplexer
PDF  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  IDT [Integrated Device Technology]
Trang chủ  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS831721I bảng dữ liệu(HTML) 6 Page - Integrated Device Technology

Back Button ICS831721I Datasheet HTML 2Page - Integrated Device Technology ICS831721I Datasheet HTML 3Page - Integrated Device Technology ICS831721I Datasheet HTML 4Page - Integrated Device Technology ICS831721I Datasheet HTML 5Page - Integrated Device Technology ICS831721I Datasheet HTML 6Page - Integrated Device Technology ICS831721I Datasheet HTML 7Page - Integrated Device Technology ICS831721I Datasheet HTML 8Page - Integrated Device Technology ICS831721I Datasheet HTML 9Page - Integrated Device Technology ICS831721I Datasheet HTML 10Page - Integrated Device Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 18 page
background image
ICS831721AGI REVISION A FEBRUARY 3, 2014
6
©2014 Integrated Device Technology, Inc.
ICS831721I Data Sheet
DIFFERENTIAL CLOCK/DATA MULTIPLEXER
Additive Phase Jitter
The spectral purity in a band at a specific offset from the fundamental
compared to the power of the fundamental is called the dBc Phase
Noise. This value is normally expressed using a Phase noise plot
and is most often the specified plot in many applications. Phase noise
is defined as the ratio of the noise power present in a 1Hz band at a
specified offset from the fundamental frequency to the power value of
the fundamental. This ratio is expressed in decibels (dBm) or a ratio
of the power in the 1Hz band to the power in the fundamental. When
the required offset is specified, the phase noise is called a dBc value,
which simply means dBm at a specified offset from the fundamental.
By investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the entire
time record of the signal. It is mathematically possible to calculate an
expected bit error rate given a phase noise plot.
As with most timing specifications, phase noise measurements has
issues relating to the limitations of the equipment. Often the noise
floor of the equipment is higher than the noise floor of the device. This
is illustrated above. The device meets the noise floor of what is
shown, but can actually be lower. The phase noise is dependent on
the input source and measurement equipment.
The source generator is the Rhode & Schwarz SMA 100A Signal
Generator 9kHz – 6GHz. Phase noise is measured with the Agilent
E5052A Signal source Analyzer.
Additive Phase Jitter @ 100MHz
12kHz to 20MHz = 0.314ps (typical)
Offset from Carrier Frequency (Hz)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com