MP6539 – 100V, THREE PHASE BLDC MOTOR PRE-DRIVER WITH HS & LS INPUTS

MP6539 Rev. 1.01

www.MonolithicPower.com

9

4/20/2018

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© 2018 MPS. All Rights Reserved.

PIN FUNCTIONS

QFN-28

Pin #

TSSOP

Pin #

Name

Description

1

11

GND

Ground.

2

12

VIN

Input supply voltage.

3

13

CSO

Current sense output and OCP off time adjust.

4

14

LDO

Gate drive LDO output/base drive for external NPN transistor.

5

15

VREG

Gate driver supply voltage.

6

16

BSTA

Bootstrap output phase A.

7

17

SHA

High-side source connection phase A.

8

18

GHA

High-side gate drive phase A.

9

19

GLA

Low-side gate drive phase A.

10

20

BSTB

Bootstrap output phase B.

11

21

SHB

High-side source connection phase B.

12

22

GHB

High-side gate drive phase B.

13

23

GLB

Low-side gate drive phase B.

14

24

BSTC

Bootstrap output phase C.

15

25

SHC

High-side source connection phase C.

16

26

GHC

High-side gate drive phase C.

17

27

GLC

Low-side gate drive phase C.

18

28

LSS

Low-side source connection.

19

1

LSC

Phase C low-side input pin.

20

2

LSB

Phase B low-side input pin.

21

3

LSA

Phase A low-side input pin.

22

4

HSC

Phase C high-side input pin.

23

5

HSB

Phase B high-side input pin.

24

6

HSA

Phase A high-side input pin.

25

7

nFAULT

Fault indication. nFAULT is an open-drain output type. nFAULT is logic

low when in a fault condition.

26

8

nSLEEP

Sleep mode input. Drive nSLEEP to logic low to operate the device in a

low-power sleep mode. Float nSLEEP to enable the device.

27

9

OCREF

Over-current protection reference input.

28

10

DT

Dead time setting.