AD9574

Data Sheet

Rev. B | Page 2 of 35

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

OUT0 Channel Absolute Clock Jitter ........................................ 3

OUT1 Channel Absolute Clock Jitter ........................................ 3

OUT2 and OUT3 Channels Absolute Clock Jitter................... 3

OUT4 and OUT5 Channels Absolute Clock Jitter................... 4

OUT6 Channel Absolute Clock Jitter ........................................ 5

Clock Outputs (OUT0_x to OUT6_x)—Static ........................ 6

Clock Outputs (OUT0_x to OUT6_x)—Dynamic.................. 6

Monitor Clock Inputs (MCLK_x)—Static ................................ 7

Monitor Clock Inputs (MCLK_x)—Dynamic.......................... 8

Reference Inputs (REF0_x and REF1_x)—Static..................... 8

Reference Inputs (REF0_x and REF1_x)—Dynamic .............. 8

Reference Switchover Output Disturbance............................... 9

Control Pins .................................................................................. 9

Status Pins.................................................................................... 10

Power Supply and Dissipation .................................................. 10

Timing Specifications ................................................................ 11

Timing Diagrams........................................................................ 12

Absolute Maximum Ratings.......................................................... 13

ESD Caution................................................................................ 13

Pin Configuration and Function Descriptions........................... 14

Typical Performance Characteristics ........................................... 17

Phase Noise and Voltage Waveforms....................................... 17

Reference Switching Frequency and Phase Disturbance ...... 19

Terminology .................................................................................... 20

Theory of Operation ...................................................................... 21

Overview ..................................................................................... 21

PPRx Pins .................................................................................... 21

PPR0—Reference Clock Input Configuration ................... 22

PPR1—Frequency Translation Settings .............................. 22

PPR2—OUT0 and OUT1 Configuration ........................... 23

PPR3—OUT4 and OUT5 Configuration ........................... 23

PPR4—OUT6 Configuration ............................................... 24

PPR5—Reference Monitor Threshold................................. 24

PPR6—Monitor Clock (MCLK_x) Input Configuration . 24

Dependency of PPR3 and PPR4 on PPR1 .......................... 24

Power-On Reset (POR) ............................................................. 25

Reference Clock Inputs.............................................................. 27

Monitor Clock Input .................................................................. 27

Reference Switching ................................................................... 27

Reference Monitor...................................................................... 27

PLL ............................................................................................... 28

Output Drivers............................................................................ 29

Output Clocks............................................................................. 29

Applications Information .............................................................. 30

Dual Oscillator Reference Input Application ......................... 30

Simple, Single Oscillator Reference Input Application ......... 31

Interfacing to CMOS Clock Outputs....................................... 31

Interfacing to LVDS and HSTL Clock Outputs ..................... 32

Interfacing to HCSL Clock Outputs ........................................ 32

Power Supply............................................................................... 33

Power and Grounding Considerations and Power Supply

Rejection...................................................................................... 33

Thermal Performance.................................................................... 34

Outline Dimensions ....................................................................... 35

Ordering Guide .......................................................................... 35

REVISION HISTORY

4/2017—Rev. A to Rev. B

Change to Figure 20 ....................................................................... 21

Updated Outline Dimensions ....................................................... 35

Changes to Ordering Guide .......................................................... 35

1/2015—Rev. 0 to Rev. A

Changes to Table 13.......................................................................... 9

Changes to Note 1, Table 17 .......................................................... 13

Deleted Thermal Resistance Section and Table 18; Renumbered

Sequentially ..................................................................................... 13

Changes to Power-On Reset (POR) Section ............................... 26

Added Figure 22; Renumbered Sequentially .............................. 26

Added Thermal Performance Section and Table 35.................. 34

9/2014—Revision 0: Initial Version