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TMUX1511PWR bảng dữ liệu(PDF) 4 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  Low-Capacitance, 1:1 (SPST) 4-Channel, Powered-Off Protected Switch with 1.8 V Logic
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TMUX1511PWR bảng dữ liệu(HTML) 4 Page - Texas Instruments

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4
TMUX1511
SCDS390 – SEPTEMBER 2018
www.ti.com
Product Folder Links: TMUX1511
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(3)
All voltages are with respect to ground, unless otherwise specified.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
MAX
UNIT
VDD
Supply voltage(3)
–0.5
6
V
VSEL
Logic control input pin voltage (SEL1, SEL2, SEL3, SEL4) (3)
–0.5
6
V
ISEL
Logic control input pin current (SEL1, SEL2, SEL3, SEL4)
-30
30
mA
VS or VD
Source or drain pin voltage(3)
–0.5
6
V
IS or ID (CONT)
Source and drain pin continuous current: (S1 to S4, D1 to D4)
-25
25
mA
Tstg
Storage temperature
–65
150
°C
TJ
Junction temperature
150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001(1)
±2000
V
Charged-device model (CDM), per JEDEC
specification JESD22-C101(2)
±750
(1)
VS_off and VD_off refers to the voltage at the source or drain pins when supply is less than 1.5 V
6.3 Recommended Operating Conditions
MIN
MAX
UNIT
VDD
Supply voltage
1.5
5.5
V
VS or VD
Signal path input/output voltage (source or drain pin), VDD ≥ 1.5 V
0
5.5
V
VS_off or VD_off
Signal path input/output voltage (source or drain pin), VDD < 1.5 V
(1)
0
3.6
V
VSEL
Control input voltage (SELx pins)
0
5.5
V
TA
Ambient temperature
–40
125
ºC
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information
THERMAL METRIC(1)
DEVICE
DEVICE
UNIT
PW (TSSOP)
RSV (UQFN)
14 PINS
16 PINS
RθJA
Junction-to-ambient thermal resistance
129.4
TBD
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
58.8
TBD
°C/W
RθJB
Junction-to-board thermal resistance
72.4
TBD
°C/W
ΨJT
Junction-to-top characterization parameter
11.6
TBD
°C/W
YJB
Junction-to-board characterization parameter
71.9
TBD
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
TBD
°C/W



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