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SN74LVC2G53 bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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SN74LVC2G53 bảng dữ liệu(HTML) 4 Page - Texas Instruments |
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4 / 31 page ![]() 4 SN74LVC2G53 SCES324P – JULY 2001 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: SN74LVC2G53 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to ground, unless otherwise specified. (3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (4) This value is limited to 5.5 V maximum. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VCC Supply voltage(2) –0.5 6.5 V VI Input voltage(2)(3) –0.5 6.5 V VI/O Switch I/O voltage(2)(3)(4) –0.5 VCC + 0.5 V IIK Control input clamp current VI < 0 –50 mA II/OK I/O port diode current VI/O < 0 or VI/O > VCC ±50 mA IT ON-state switch current VI/O = 0 to VCC ±50 mA Continuous current through VCC or GND ±100 mA TJ Junction temperature 150 °C Tstg Storage temperature –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 (1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See Implications of Slow or Floating CMOS Inputs, SCBA004. 6.3 Recommended Operating Conditions See note (1). MIN MAX UNIT VCC Supply voltage 1.65 5.5 V VI/O I/O port voltage 0 VCC V VIH High-level input voltage, control input VCC = 1.65 V to 1.95 V VCC × 0.65 V VCC = 2.3 V to 2.7 V VCC × 0.7 VCC = 3 V to 3.6 V VCC × 0.7 VCC = 4.5 V to 5.5 V VCC × 0.7 VIL Low-level input voltage, control input VCC = 1.65 V to 1.95 V VCC × 0.35 V VCC = 2.3 V to 2.7 V VCC × 0.3 VCC = 3 V to 3.6 V VCC × 0.3 VCC = 4.5 V to 5.5 V VCC × 0.3 VI Control input voltage 0 5.5 V Δt/Δv Input transition rise and fall time VCC = 1.65 V to 1.95 V 20 ns/V VCC = 2.3 V to 2.7 V 20 VCC = 3 V to 3.6 V 10 VCC = 4.5 V to 5.5 V 10 TA Operating free-air temperature –40 85 °C |
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