ADAU1361BCPZ-R7 datasheet(8/80 Pages) AD

8 / 80 page

ADAU1361

Data Sheet

Rev. D | Page 8 of 80

TYPICAL CURRENT CONSUMPTION

Master clock = 12.288 MHz, input sample rate = 48 kHz, input tone = 1 kHz, normal power management settings, ADC input @ −1 dBFS,

DAC input @ 0 dBFS. For total power consumption, add the IOVDD current listed in Table 2.

Table 3.

Operating Voltage

Audio Path

Clock Generation

Typical AVDD Current

Consumption (mA)

AVDD = IOVDD = 3.3 V

Record stereo differential to ADC

Direct MCLK

5.24

Integer PLL

6.57

DAC stereo playback to line output (10 kΩ)

Direct MCLK

5.55

Integer PLL

6.90

DAC stereo playback to headphone (16 Ω)

Direct MCLK

55.5

Integer PLL

56.8

DAC stereo playback to headphone (32 Ω)

Direct MCLK

30.9

Integer PLL

32.25

DAC stereo playback to capless headphone (32 Ω)

Direct MCLK

56.75

Integer PLL

Record aux stereo bypass to line output (10 kΩ)

Direct MCLK

1.9

Integer PLL

3.3

AVDD = IOVDD = 1.8 V

Record stereo differential to ADC

Direct MCLK

4.25

Integer PLL

5.55

DAC stereo playback to line output (10 kΩ)

Direct MCLK

4.7

Integer PLL

5.7

DAC stereo playback to headphone (16 Ω)

Direct MCLK

30.81

Integer PLL

DAC stereo playback to headphone (32 Ω)

Direct MCLK

18.3

Integer PLL

19.5

DAC stereo playback to capless headphone (32 Ω)

Direct MCLK

32.6

Integer PLL

33.7

Record aux stereo bypass to line output (10 kΩ)

Direct MCLK

1.9

Integer PLL

3.07

ADAU1361BCPZ-R7 bảng dữ liệu(PDF) 8 Page - Analog Devices

ADAU1361BCPZ-R7 bảng dữ liệu(HTML) 8 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

bảng dữ liệu tải về

Link URL