STW81100

6/23

Notes: 1. : see relationship between ICP and REXT in the Circuit Description section (Charge Pump)

2. : Comparison frequency leakage (400KHz) and harmonics

3. : Guaranteed by design and characterization.

PLL MISCELLANEUS

Current Consumption

Input Buffer, Prescaler, Digital

Dividers, misc

10

mA

Lock up time

40 KHz PLL bandwidth; within

1 ppm of frequency error

150

µs

Parameter

Test Condition

Min

Typ

Max

Units

Normalized In Band Phase Noise

Floor

ICP=2mA, PLL BW = 50KHz;

including reference clock contribution

-212

dBc/Hz

In Band Phase Noise Floor

Direct Output

In Band Phase Noise Floor

Divider by 2

In Band Phase Noise Floor

Divider by 4

PLL Integrated Phase Noise with Divider by 2

Integrated Phase Noise (single

sided) 400Hz to 4MHz

(N = 10000), PLL BW = 15KHz

-39

-37

dBc

Integrated Phase Noise (single

sided) 100Hz to 25MHz

-38

-36

dBc

VCO A Direct (3280MHz-3900MHz) – Open Loop

Phase Noise @ 1 KHz

-56

-53

dBc/Hz

Phase Noise @ 10 KHz

-83

-82

dBc/Hz

Phase Noise @ 100 KHz

-105

-102

dBc/Hz

Phase Noise @ 1 MHz

-128

-125

dBc/Hz

Phase Noise @ 10 MHz

-148

-145

dBc/Hz

Phase Noise @ 40 MHz

-156

-153

dBc/Hz

VCO B Direct (3800MHz-4400MHz) – Open Loop

Phase Noise @ 1 KHz

-55

-52

dBc/Hz

Phase Noise @ 10 KHz

-82

-79

dBc/Hz

Phase Noise @ 100 KHz

-104

-101

dBc/Hz

Phase Noise @ 1 MHz

-127

-124

dBc/Hz

Phase Noise @ 10MHz

-147

-143

dBc/Hz

Phase Noise @ 40 MHz

-155

-152

dBc/Hz

VCO A with divider by 2 (1640MHz-1950MHz) – Open Loop

Phase Noise @ 1 KHz

-62

-59

dBc/Hz

Phase Noise @ 10 KHz

-89

-86

dBc/Hz

Phase Noise @ 100 KHz

-111

-108

dBc/Hz

Phase Noise @ 1 MHz

-134

-131

dBc/Hz

Phase Noise @ 10 MHz

-150

-148

dBc/Hz

Phase Noise @ 20 MHz

-152

-150

dBc/Hz

Phase Noise Floor @ 40 MHz

-153

-151

dBc/Hz

Table 6. Electrical Characteristcs (continued)