STV0684 datasheet(16/49 Pages) STMICROELECTRONICS

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Functional Description

STV0684

16/49

Core architecture and block diagram

3.3

SFP module

The SFP module is based on reconfigurable device pins combined with some local logic to

maximize in-system flexibility of the device in any given application

An SFP can be configured either to be driven as a GPIO or by the local logic block within the

STV0684 (detailed in

Figure 3). The functionality and configuration of each SFP is determined and

managed under control of the ST20. Control registers local to each module are mapped into the

processors address space, this leaves the processor to support more demanding, computational

intensive tasks.

Figure 4: ST20DC3 architecture and block diagram

ST20-C103

SDRAM

ST20-C103

ICache

DCache

peripheral

controller

port

Peripheral 1

ST Bus Type 2 domain

ST Bus Type 1 domain

ST20-C103

Interconnect

Peripheral 2

Peripheral 10

Peripheral 11

Peripheral 10

Peripheral 20

Boot ROM

STV0684 bảng dữ liệu(PDF) 16 Page - STMicroelectronics