5

PS8683B

10/17/03

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PI6CVF857

1:10 PLL Clock Driver for

2.5V DDR-SDRAM Memory

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Note:

4. The maximum power-down clock frequency is below 20 MHz.

5. Guaranteed by design, but not production tested.

Electrical Characteristics for PC1600 ~ PC2700 (Over recommended operating free-air temperature)

Notes:

1. The PLL is able to handle spread spectrum induced skew.

2. Operating clock frequency indicates a range over which the PLL is able to lock, but in which the clock is not required to meet the other timing

parameters. (Used for low-speed debug).

3. Application clock frequency indicates a range over which the PLL meets all of the timing parameters.

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