APA2621 datasheet(13/24 Pages) ANPEC

13 / 24 page

Rev. A.4 - May., 2017

www.anpec.com.tw

APA2621

Function Description

Class-D Operation

Figure1. The APA2621 Output Waveform

The APA2621 uses a modulation scheme that allows

operation without the classic LC reconstruction filter when

the amp is driving an inductive load. Each output is switch-

ing from 0 volts to the supply voltage. The V

OUTP and VOUTN

are in phase with each other with no input so that there is

little or no current in the speaker. The duty cycle of V

OUTP is

greater than 50% and V

OUTN is less than 50% for positive

output voltages. The duty cycle of V

OUTP is less than 50%

and V

OUTN is greater than 50% for negative output voltages.

The voltage across the load sits at 0V throughout most of

the switching period,

Gain Setting Operation

The APA2621

’s gain can be set by GAIN0, GAIN1. The

detail gain setting value is list at table 1.

Shutdown Operation

In order to reduce power consumption while not in use,

the APA2621 contains a shutdown function to externally

turn off the amplifier bias circuitry. This shutdown feature

turns the amplifier off when logic low is placed on the SD

pin for APA2621. The trigger point between a logic high

and logic low level is typically 2.2V. It is best to switch

between ground and the supply voltage VDD to provide

maximum device performance. By switching the SD pin

to low level, the amplifier enters a low-consumption- cur-

rent state, IDD for APA2621 is in shutdown mode. On

normal operating, APA2621

’s SD pin should pull to high

level to keeping the IC out of the shutdown mode. The SD

pin should be tied to a definite voltage to avoid unwanted

state changes.

Gain1

Gain0

Gain

Input Impedance

60k

Ω

30k

Ω

15k

Ω

Table 1 : The Gain Setting

VOUTP

VOUTN

VOUT

(VOUTP-VOUTN)

IOUT

Output = 0

Output > 0

Output < 0

VOUTP

VOUTN

VOUT

(VOUTP-VOUTN)

IOUT

VOUTP

VOUTN

VOUT

(VOUTP-VOUTN)

IOUT

reducing the switching current, which reduces any I2R

losses in the load.

Power Limit Operation

The voltage at pin 10 can used to limit the power to levels

below that which is possible based on the supply rail.

Add a resistor divider from Vclamp to ground to set the

voltage at the PLIMIT pin. An external reference may also

be used if tighter tolerance is required. Also add a 1

µF

capacitor from pin 10 to ground.

The PLIMIT circuit sets a limit on the output peak-to-peak

voltage. The limiting is done by limiting the duty cycle to

fixed maximum value. This limit can be thought of as a

“virtual” voltage rail which is lower than the supply con-

nected to PVDD. This

“virtual” rail is 5.6 times the voltage

at the PLIMIT pin. This output voltage can be used to

calculate the maximum output power for a given maxi-

mum input voltage and speaker impedance.

P = 5.6 × PLIMIT voltage if PLIMIT < 2.5 V

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