TLE 6365

Data Sheet Rev. 1.7

10

2003-06-02

Buck Converter

A stabilized logic supply voltage (typ. 5 V) for general purpose is realized in the system

by a buck converter. An external buck-inductance

L

DMOS power transistor with the programmed frequency (pin R).

The buck converter uses the temperature compensated bandgap reference voltage

(typ. 2.8 V) for its regulation loop.

This reference voltage is connected to the non-inverting input of the error amplifier and

an internal voltage divider supplies the inverting input. Therefore the output voltage

V

CC

is fixed due to the internal resistor ratio to typ. 5.0 V.

The output of the error amplifier goes to the inverting input of the PWM comparator as

well as to the buck compensation output BUC.

When the error amplifier output voltage exceeds the sawtooth voltage the output power

MOS-transistor is switched on. So the duration of the output transistor conduction phase

depends on the

V

Figure 4

Buck Converter Block Diagram

External loop compensation is required for converter stability, and is formed by

connecting a compensation resistor-capacitor series-network (

R

BUC and GND.

GND

2,8V

OC

COMP

&

NAND 2

R

Sense

18m

Ω

-

+

-

+

-

+

-

+

V

REF

Gate

Driver

GND

1,2V

V

thOV

GND

4V

V

thUV

H when

OV at V

CC

H when UV

at V

BOOST

L when

Overcurrent

Power

D-MOS

PWM

COMP

Error

AMP

OV

COMP

UV

COMP

L when

Overcurrent

PWM-FF

Error-Signal

V

thOC

18mV

1

INV

ERROR-FF

Oscillator

Schmitt-trigger 1

Error-Ramp

R

Pin 1

V

S

Pin 8

BUO

Pin 7

Clock

Ramp

NOR 1

>1

&

&

R

S

Q

Q

&

&

R

S

Q

Q

BUC

Pin 3

GND

R

VCC2

28R

R

Prot1

200

Ω

V

CC

R

VCC1

22R

GND

R

VCC4

10R3

V

CC

R

VCC3

39R7

NOR1

Output Stage OFF when H

V

CC

Pin 5

V

min

V

max

t

t

r

t

V

low

V

high

t

t

r

t

f

t

r

L when

T

BDS

Pin 6

Gate

Driver

Supply

OFF when H

H when

Error-Signal

<

Error-Ramp

H=

OFF

H=

ON