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SSM2212RZ-R7 bảng dữ liệu(PDF) 9 Page - Analog Devices

tên linh kiện SSM2212RZ-R7
Giải thích chi tiết về linh kiện  Audio, Dual-Matched NPN Transistor
PDF  12 Pages
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SSM2212RZ-R7 bảng dữ liệu(HTML) 9 Page - Analog Devices

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Data Sheet
SSM2212
Rev. C | Page 9 of 12
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
C1 1
B1 2
E1 3
NIC 4
C2
8
B2
7
E2
6
NIC
5
SSM2212
TOP VIEW
(Not to Scale)
NOTES
1. NIC = NO INTERNAL CONNECTION.
Figure 17. SOIC Pin Configuration
Table 5. SOIC Pin Function Descriptions
Pin No.
Mnemonic
Description
1
C1
Collector of Channel 1.
2
B1
Base of Channel 1.
3
E1
Emitter of Channel 1.
4, 5
NIC
No Internal Connection.
6
E2
Emitter of Channel 2.
7
B2
Base of Channel 2.
8
C2
Collector of Channel 2.
12
11
10
1
3
49
2
E1A
E1B
E2B
E2A
NIC
C2
NIC
NIC
NOTES
1. NIC = NO INTERNAL CONNECTION.
2. EXPOSED PAD. THE EXPOSED PAD MUST BE
CONNECTED TO THE LOWEST POTENTIAL.
SSM2212
TOP VIEW
(Not to Scale)
Figure 18. LFCSP Pin Configuration
Table 6. LFCSP Pin Function Descriptions
Pin No.
Mnemonic
Description
1
E1A
Emitter of Channel 1. Must be connect to E1B.
2
E1B
Emitter of Channel 1. Must be connect to E1A.
3
E2B
Emitter of Channel 2. Must be connect to E2A.
4
E2A
Emitter of Channel 2. Must be connect to E2B.
5, 7, 8, 9, 10, 12, 14, 16
NIC
No Internal Connection.
6
B2
Base of Channel 2.
11
C2
Collector of Channel 2.
13
C1
Collector of Channel 1.
15
B1
Base of Channel 1.
EPAD
Exposed Pad. The exposed pad must be connected to the lowest potential.



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