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74AC299 bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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74AC299 bảng dữ liệu(HTML) 1 Page - STMicroelectronics |
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1 / 13 page ![]() 1/13 April 2001 s HIGH SPEED: s fMAX = 240MHz (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 8µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) s 50 Ω TRANSMISSION LINE DRIVING CAPABILITY s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 299 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74AC299 is an advanced high-speed CMOS 8-BIT PIPO SHIFT REGISTER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. These devices have four modes (HOLD, SHIFT LEFT, SHIFT RIGHT and LOAD DATA). Each mode is chosen by two function select inputs (S0, S1) as shown in the Truth Table. When one or both enable inputs, (G1, G2) are high, the eight input/output terminals are in the high-impedance state; however sequential operation or clearing of the register is not affected. Clear function is asynchronous to clock. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74AC299 8 BIT PIPO SHIFT REGISTER WITH ASYNCHRONOUS CLEAR PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP 74AC299B SOP 74AC299M 74AC299MTR TSSOP 74AC299TTR TSSOP DIP SOP |
Số phần tương tự - 74AC299 |
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Mô tả tương tự - 74AC299 |
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