ZL2004 datasheet(15/42 Pages) RENESAS

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ZL2004

FN6846 Rev. 3.00

Page 15 of 42

February 15, 2011

5.3 Start-up Procedure

The ZL2004 follows a specific internal start-up

procedure after power is applied to the VDD pin. Table

10 describes the start-up sequence.

If the device is to be synchronized to an external clock

source, the clock frequency must be stable prior to

asserting

the

pin.

The

device

requires

approximately 5-10 ms to check for specific values

stored in its internal memory. If the user has stored

values in memory, those values will be loaded. The

device will then check the status of all multi-mode pins

and load the values associated with the pin settings.

Once this process is completed, the device is ready to

accept commands via the I

2C/SMBus interface and the

device is ready to be enabled. Once enabled, the device

requires approximately 2 ms before its output voltage

may be allowed to start its ramp-up process. If a soft-

start delay period less than 2 ms has been configured

(using PMBus commands), the device will default to a

2 ms delay period (with an accuracy of approx ±0.25

ms). If a delay period greater than 2 ms is configured,

the device will wait for the configured delay period

prior to starting to ramp its output.

After the delay period has expired, the output will

begin to ramp towards its target voltage according to

the pre-configured soft-start ramp time that has been

set using the SS pin.

5.4 Soft Start Delay and Ramp Times

Soft Start Delay and Ramp Times

In some applications, it may be necessary to set a delay

from when an enable signal is received until the output

voltage starts to ramp to its target value. In addition,

the designer may wish to precisely set the time

required for VOUT to ramp to its target value after the

delay period has expired. These features may be used

as part of an overall inrush current management

strategy or to precisely control how fast a load IC is

turned on. The ZL2004 gives the system designer

several

options

for

precisely

and

independently

controlling both the delay and ramp time periods.

The soft-start delay period begins when the EN pin is

asserted and ends when the delay time expires. The

soft-start delay period is set using the SS pin.

The soft-start ramp timer enables a precisely controlled

ramp to the nominal VOUT value that begins once the

delay period has expired. The ramp-up is guaranteed

monotonic and its slope may be precisely set using the

SS pin.

The soft start delay and ramp times can be set to

standard values according to Table 11.

Table 10. ZL2004 Start-up Sequence

Step #

Step Name

Description

Time Duration

Power Applied

Input voltage is applied to the ZL2004’s VDD pin

Depends on input supply

ramp time

Internal Memory

Check

The device will check for values stored in its internal

memory. This step is also performed after a Restore

command.

Approx 5-10 ms (device

will ignore an enable signal

or PMBus traffic during this

period)

Multi-mode Pin

Check

The device loads values configured by the multi-

mode pins.

Device Ready

The device is ready to accept an enable signal.



Pre-ramp Delay

The device requires approximately 2 ms following an

enable signal and prior to ramping its output.

Additional pre-ramp delay may be configured using

the Delay pins.

Approximately 2 ms

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