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Date: 20.04.04

Page 8 of 30

Title:

Data Sheet GC-IP200

Name of Document:

43500-DB-2-1-E-IP200.pdf

4

Digital Operation Modes

4.1

Output Signals / Counter Value

The position/angle result is available via the integrated serial interface in a 28-bit two's-complement format.

As described, the zero point can be generated using the REFP and REFN reference signal inputs, or it can be

set via the serial interface. By activating the trigger input, measuring result can be kept in a 2-level deep

buffer register in a manner asynchronous to the access via the interfaces.

Simultaneously, the IP200 outputs the phase shifted square wave sequences (known by incremental

measuring transducers) which can be counted in single or quadruple way.

A synchronous reference pulse is generated when the angle of 0° (refer also to Fig. 2) is passed through and

when the analogue differential input voltage between REFP and REFN exceed the positive comparator

hysteresis level. If the differential input voltage is permanently above this level, the reference pulse is

generated once during every signal period. A configuration bit can disable the generation of the reference

pulse.

t

pp

A

B

OREF

Edge Interval

-5

-4

-3

-2

-1

0

1

2

1

0

-1

-2

-3

-4

-5

internal

Counter

Figure 5



Note that the IP200 IC based on a digital interpolation method. This means that the quantization errors (the

so-called

1 errors) which are inevitable with A/D converters are superposed upon the speed-proportional

A/B output signals. Analogue control systems must feature a corresponding low-pass behaviour when the IC

is used in such systems.