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EL5421 bảng dữ liệu(PDF) 11 Page - Renesas Technology Corp |
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EL5421 bảng dữ liệu(HTML) 11 Page - Renesas Technology Corp |
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11 / 12 page ![]() EL5421 FN7198 Rev 2.00 Page 11 of 12 August 2, 2007 Unused Buffers It is recommended that any unused buffer have the input tied to the ground plane. Driving Capacitive Loads The EL5421 can drive a wide range of capacitive loads. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. The buffers drive 10pF loads in parallel with 10k with just 1.5dB of peaking, and 100pF with 6.4dB of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5 and 50) can be placed in series with the output. However, this will obviously reduce the gain slightly. Another method of reducing peaking is to add a "snubber" circuit at the output. A snubber is a shunt load consisting of a resistor in series with a capacitor. Values of 150 and 10nF are typical. The advantage of a snubber is that it does not draw any DC load current or reduce the gain. Power Supply Bypassing and Printed Circuit Board Layout The EL5421 can provide gain at high frequency. As with any high-frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, a 0.1µF ceramic capacitor should be placed from VS+ to pin to VS- pin. A 4.7µF tantalum capacitor should then be connected in parallel, placed in the region of the buffer. One 4.7µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.6 0.4 0.3 0.2 0.1 0 0 255075 100 125 AMBIENT TEMPERATURE (°C) 85 486mW JA = 206 °C /W MS OP 10 0.5 FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE |
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