EL5210CSZ datasheet(12/16 Pages) RENESAS

12 / 16 page

EL5210, EL5410

FN7185 Rev 3.00

Page 12 of 16

July 5, 2007

when sourcing, and

when sinking.

Where:

i = 1 to 2 for Dual and 1 to 4 for Quad

VS = Total Supply Voltage

ISMAX = Maximum Supply Current Per Amplifier

VOUTi = Maximum Output Voltage of the Application

ILOADi = Load current

If we set the two PDMAX equations equal to each other, we

can solve for RLOADi to avoid device overheat. Figure 3 and

Figure 4 provide a convenient way to see if the device will

overheat. The maximum safe power dissipation can be

found graphically, based on the package type and the

ambient temperature. By using the previous equation, it is a

simple matter to see if PDMAX exceeds the device's power

derating curves. To ensure proper operation, it is important

to observe the recommended derating curves shown in

Figure 3 and Figure 4.

FIGURE 3. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

FIGURE 4. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

Unused Amplifiers

It is recommended that any unused amplifiers in a dual and

a quad package be configured as a unity gain follower. The

inverting input should be directly connected to the output

and the non-inverting input tied to the ground plane.

Driving Capacitive Loads

The EL5210 and EL5410 can drive a wide range of

capacitive loads. As load capacitance increases, however,

the -3dB bandwidth of the device will decrease and the

peaking increase. The amplifiers drive 10pF loads in parallel

with 1k

 with just 1.2dB of peaking, and 100pF with 6.5dB of

peaking. If less peaking is desired in these applications, a

small series resistor (usually between 5

 and 50) can be

placed in series with the output. However, this will obviously

reduce the gain slightly. Another method of reducing peaking

is to add a "snubber" circuit at the output. A snubber is a

shunt load consisting of a resistor in series with a capacitor.

Values of 150

 and 10nF are typical. The advantage of a

snubber is that it does not draw any DC load current or

reduce the gain.

Power Supply Bypassing and Printed Circuit

Board Layout

The EL5210 and EL5410 can provide gain at high frequency.

As with any high-frequency device, good printed circuit

board layout is necessary for optimum performance. Ground

plane construction is highly recommended, lead lengths

should be as short as possible and the power supply pins

must be well bypassed to reduce the risk of oscillation. For

normal single supply operation, where the VS- pin is

connected to ground, a 0.1µF ceramic capacitor should be

placed from VS+ to pin to VS- pin. A 4.7µF tantalum

capacitor should then be connected in parallel, placed in the

region of the amplifier. One 4.7µF capacitor may be used for

multiple devices. This same capacitor combination should be

placed at each supply pin to ground if split supplies are to be

used.

PDMAX

iV



ISMAX V



OUTiVS- 

ILOADi



–



150

400

800

Ambient Temperature (°C)

100

1200

1000

600

200

125

MAX TJ=125°C

TSSOP14

JA=100°C/W

SO8

JA=110°C/W

Packages Mounted on a JEDEC JESD51-7 High Effective

Thermal Conductivity Test Board

1.0W

1.136W

909mW

833mW

SO14

JA=88°C/W

MSOP8

JA=115°C/W

150

400

800

Ambient Temperature (°C)

100

0125

1200

1000

600

200

MAX TJ=125°C

TSSOP14

JA=165°C/W

SO8

JA=160°C/W

MSOP8

JA=206°C/W

SO14

JA=120°C/W

Packages Mounted on a JEDEC JESD51-3 Low Effective

Thermal Conductivity Test Board

833mW

606mW

625mW

485mW

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