ISL97698 datasheet(13/21 Pages) RENESAS

13 / 21 page

ISL97698

FN8417 Rev.1.00

Page 13 of 21

Sep 7, 2017

The SWIRE programming is summarized as follows:

• Logic 0 = Negative pulse >90µs and <120µs

• Logic 1 = Negative pulse >15µs and <45µs

• Load = Negative pulse >215µs

The serial interface is automatically reset to 0 when the power is

cycled, or register 02h is written to 00h.

Figure 22 shows an example of transmitting and loading the

value b’10010110’.

IC Enable

When the enable (EN) pin voltage is high and VIN and VIN_IO are

above rising UVLO thresholds, all ISL97698 circuit blocks are

enabled and the boost converter starts to operate. The IC is

disabled by pulling the EN pin low, which immediately turns off

LED channels and the boost regulator.

When EN is low, the PWM, SWIRE, and I2C interfaces are all

disabled, data most recently written by I2C in the registers will be

maintained.

Boost Converter

The ISL97698 implements a current mode control boost

architecture. The boost produces the minimum voltage needed

to enable the LED stack with the highest forward voltage drop to

run at the programmed current. It has a fast current sense loop

and a slow voltage feedback loop. This architecture achieves fast

transient response which is essential for portable product

backlight applications, in which the backlight must not flicker

when the power source is changed from a drained battery to an

AC/DC adapter.

Switching Frequency

The boost switching frequency is adjustable with an internal

850kHz. The adjustable range is from 460kHz to 1.5MHz. Table 2

on page 12 shows the different frequencies with different

PFM/Synchronous Pulse Skipping

At low output current, the ISL97698 boost regulator transitions

from PWM mode to PFM/skip mode to reduce switching losses

and maximize efficiency. The regulator transitions from PWM

mode to PFM/skip mode when the average inductor current is

lower than a set value for 16 successive boost switching cycles. It

transitions back from PFM/skip mode to PWM mode when it is

switching at the maximum frequency without pulse skipping for

16 successive boost switching cycles, or when the output voltage

falls below the target level.

The ISL97698 uses one of two possible modes of operation:

1. Synchronous Pulse Skipping Mode (Default mode,

04h<5>=1): The boost regulator issues a switching cycle

when the output voltage has fallen below the set level, but it

waits for the next pulse of the internal oscillator for this

switching cycle, aligning all cycles to the fixed oscillator

frequency.

2. Pure PFM Mode (04h<5>=0): The boost regulator does one

switch cycle asynchronously whenever its output falls below

its set value and previous cycle is complete.

The different PFM modes can be selected by controlling bit 5 of

Mode, but is factory configurable to Pure PFM Mode. See“Factory

Trimming Option” on page 18.

In both modes, at each boost switching cycle the inductor current

reaches the peak value of 300mA (typical). The peak inductor

current and average inductor current when it enters PFM mode

can be adjusted by writing different values into register 03h (see

Table 2 on page 12), or by factory trimming (see“Factory

Trimming Option” on page 18).

There is hysteresis built in for the PFM transition. This is to

prevent inadvertently going back and forth between PWM and

PFM modes.

AUDIO BAND SUPPRESSION (ABS)

The ISL97698 PFM and skip modes feature an ultrasonic mode,

which prevents the switching frequency from falling below 30kHz

to avoid audible noise in the application. When the time interval

between two consecutive switching cycles in PFM or skip mode is

more than 33ms (i.e. 30kHz frequency) the regulator reduces the

peak inductor current at each cycle, to maintain the frequency

above 30kHz. The peak inductor current is reduced in successive

steps to 240mA, 200mA, and 162mA. Each step reduces the

power delivered per pulse to about 65% of the previous one. This

is the Audio Band Suppression (ABS) mode.

FIGURE 22. SWIRE TIMING DIAGRAM

“1”

“0”

“1”

“0”

“1”

“0”

“Load”

Time

200µs

400µs

600µs

800µs

1ms

1.2ms

1.4ms

1.6ms

25µs

(15~45µs)

100µs

(90~120µs)

VIH

VIL

250µs

(215µs min)

High Time

(3µs min)

VIO

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