S29CD032G datasheet(88/93 Pages) SPANSION

88 / 93 page

S29CD032G

30606B0 March 22, 2004

Ad va n c e

In f o rm a t i o n

Erase and Programming Performance

Notes:

1. Typical program and erase times assume the following conditions: 25

°C, 2.5 V VCC, 100K cycles. Additionally,

programming typicals assume checkerboard pattern.

2. Under worst case conditions of 145°C, VCC = 2.5 V, 1M cycles.

3. The typical chip programming time is considerably less than the maximum chip programming time listed.

4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program

command. See Tables 19 and 20 for further information on command definitions.

6. PPBs have a program/erase cycle endurance of 100 cycles.

Latchup Characteristics

Includes all pins except VCC. Test conditions: VCC = 3.0 V, one pin at a time.

PQFP and Fortified BGA Pin Capacitance

Notes:

1. Sampled, not 100% tested.

2. Test conditions TA = 25°C, f = 1.0 MHz.

Parameter

Typ (Note 1)

Max (Note

Unit

Comments

Sector Erase Time

1.0

Excludes 00h programming

prior to erasure (Note 4)

Chip Erase Time

230

Double Word Program Time

250

µs

Excludes system level

overhead (Note 5)

Accelerated Double Word Program Time

130

µs

Accelerated Chip Program Time

Chip Program Time

(Note 3)

x32

120

Description

Min

Max

Input voltage with respect to VSS on all pins except I/O pins

(including A9, ACC, and WP#)

–1.0 V

12.5 V

Input voltage with respect to VSS on all I/O pins

–1.0 V

VCC + 1.0 V

VCC Current

–100 mA

+100 mA

Parameter

Symbol

Parameter Description

Test Setup

Typ

Max

Unit

CIN

Input Capacitance

VIN = 0

7.5

COUT

Output Capacitance

VOUT = 0

8.5

CIN2

Control Pin Capacitance

VIN = 0

7.5

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