ADC0803 datasheet(10/17 Pages) RENESAS

10 / 17 page

ADC0803, ADC0804

FN3094 Rev 4.00

Page 10 of 17

August 2002

applied to the VlN(-) pin to absorb the offset, the reference

voltage can be made equal to 1/2 of the 3V span or 1.5V. The

A/D now will encode the VlN(+) signal from 0.5V to 3.5V with the

0.5V input corresponding to zero and the 3.5V input

corresponding to full scale. The full 8 bits of resolution are

therefore applied over this reduced analog input voltage range.

The requisite connections are shown in Figure 13. For

expanded scale inputs, the circuits of Figures 14 and 15 can be

used.

Reference Accuracy Requirements

The converter can be operated in a pseudo-ratiometric mode

or an absolute mode. In ratiometric converter applications, the

magnitude of the reference voltage is a factor in both the

output of the source transducer and the output of the A/D

converter and therefore cancels out in the final digital output

code. In absolute conversion applicatIons, both the initial value

and the temperature stability of the reference voltage are

important accuracy factors in the operation of the A/D

converter. For VREF/2 voltages of 2.5V nominal value, initial

errors of

10mV will cause conversion errors of 1 LSB due to

the gain of 2 of the VREF/2 input. In reduced span applications,

the initial value and the stability of the VREF/2 input voltage

become even more important. For example, if the span is

reduced to 2.5V, the analog input LSB voltage value is

correspondingly reduced from 20mV (5V span) to 10mV and 1

LSB at the VREF/2 input becomes 5mV. As can be seen, this

reduces the allowed initial tolerance of the reference voltage

and requires correspondingly less absolute change with

temperature variations. Note that spans smaller than 2.5V

place even tighter requirements on the initial accuracy and

stability of the reference source.

In general, the reference voltage will require an initial

adjustment. Errors due to an improper value of reference

voltage appear as full scale errors in the A/D transfer function.

FIGURE 12. THE VREFERENCE DESIGN ON THE IC

FIGURE 13. OFFSETTING THE ZERO OF THE ADC080X AND

PERFORMING AN INPUT RANGE (SPAN)

ADJUSTMENT

V+

DGND

VREF/2

AGND

(VREF)

DIGITAL

CIRCUITS

ANALOG

CIRCUITS

810

DECODE

300

TO VREF/2

TO VIN(-)

ZERO SHIFT VOLTAGE

0.1

F

VREF

(5V)

ADJ.

“SPAN”/2

ICL7611

FIGURE 14. HANDLING

10V ANALOG INPUT RANGE

FIGURE 15. HANDLING

5V ANALOG INPUT RANGE

VIN(-)

VIN 10V

VIN(+)

(VREF)

V+

F

ADC0803-

ADC0804

VIN(-)

VIN 5V

VIN(+)

(VREF)

V+

F

ADC0803-

ADC0804

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