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PEF82913 bảng dữ liệu(PDF) 64 Page - Infineon Technologies AG |
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PEF82913 bảng dữ liệu(HTML) 64 Page - Infineon Technologies AG |
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64 / 240 page ![]() PEF 82912/82913 Functional Description Data Sheet 50 2001-03-30 • Figure 24 MONITOR Interrupt Structure 2.3.4 C/I Channel Handling The Command/Indication channel carries real-time status information between the Q- SMINT®I and another device connected to the IOM®-2. 1) C/I0 channel lies in IOM®-2 channel 0 and access may be arbitrated via the TIC bus access protocol. In this case the arbitration is done in IOM®-2 channel 2. The C/I0 channel is accessed via register CIR0 (received C/I0 data from DD) and register CIX0 (transmitted C/I0 data to DU). The C/I0 code is four bits long. In the receive direction, the code from layer-1 is continuously monitored, with an interrupt being generated any time a change occurs (ISTA.CIC). C/I0 only: a new code must be found in two consecutive IOM®-2 frames to be considered valid and to trigger a C/I code change interrupt status (double last look criterion). In the transmit direction, the code written in CIX0 is continuously transmitted in C/I0. 2) A second C/I channel (called C/I1) lies in IOM®-2 channel 1 and is used to convey real time status information of the on-chip S-transceiver or an external device. The C/I1 channel consists of four or six bits in each direction. The width can be changed from 4 bit to 6 bit by setting bit CIX1.CICW. CIC ST MOS S WOV INT ISTA CIC ST MOS S WOV U U MASK MRE MDR MIE MDA MER MAB MOSR MOCR 0 1 1 0 |
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