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AC104Z bảng dữ liệu(PDF) 21 Page - Broadcom Corporation.

tên linh kiện AC104Z
Giải thích chi tiết về linh kiện  Ultra Low Power 10/100 Quad SMII/RMII Ethernet Transceiver
PDF  66 Pages
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nhà sản xuất  BOARDCOM [Broadcom Corporation.]
Trang chủ  http://www.broadcom.com
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Data Sheet
AC104Z
9/9/02
Br oad c om
Document
AC104Z-DS03-405-R
Initialization and Setup
Page 11
DIAGNOSTICS
Loopback Operation
Local Loopback is provided for testing and can be enabled by writing to Register 0.14 (LPBK).
The Local Loopback routes transmitted data through the transmit path back to the receiving path’s clock and data recovery
module. The loopback data are presented to the PCS in 5-bit symbol format. This loopback checks the operation of the 5-
bit symbol decoder and the phase locked loop circuitry. In Local Loopback, the SD output is forced to logic 1 and TXOP/N
outputs are tri-stated.
Cable Length Indicator
The Phy can detect the approximate length of the cable to which it’s attached and display the result in Register 20.[7:4]. A
reading of [0000] translates to < 10 meters of cable used, [0001] translates to ~ 10 meters of cable, and [1111] translates to
150 metes of cable. The cable length value can be used by the network manager to determine the proper connectivity of the
cable and to manage the cable plant distribution
RESET AND POWER
The Phy can be reset in three ways:
•
During initial power on.
•
Hardware Reset: A logic low signal of 150
µs pulse width is applied to RST* pin.
•
Software Reset: Write a one to SMI Reg. 0.15.
The device’s built-in power management features significantly reduce power consumption. Separate power supply lines
power the 10Base-T circuitry and the 100Base-TX circuitry. The two circuits, therefore, can be turned-on and turned-off
independently. When the Phy is set to operate in 100Base-TX mode, the 10Base-T circuitry is powered down, and vice
versa.
The following power management features are supported:
•
Power down mode: This can be achieved by writing to Register 0.11 or pulling PWRDN pin high. During power down
mode, the device is still able to interface through the MDC/MDIO management interface.
•
Energy-detect/power-saving mode: Energy-detect mode turns off the power to select internal circuitry when there is no
live network connected. The Energy Detect (ED) circuit is always turned on to monitor for a signal energy present on the
media. The SMI circuitry is also powered on and ready to respond to any management transaction. The transmit circuit
still sends out link pulses with minimum power consumption. If a valid signal is received from the media, the device
powers up and resumes normal transmit/receive operation. (Patent Pending)
•
Reduced Transmit Drive Strength mode: Additional power saving can be gained at the Phy level by designing with
1.25:1 turns ration magnetic and asserting the TP125 pin at reset.
CLOCK
The clock input must be a TTL clock oscillator measured at 125 MHz—100PPM for SMII or 50 MHz—100PPM for RMII.



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