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HIP4081AIP bảng dữ liệu(PDF) 17 Page - Renesas Technology Corp

tên linh kiện HIP4081AIP
Giải thích chi tiết về linh kiện  80V/2.5A Peak, High Frequency Full Bridge FET Driver
PDF  17 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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HIP4081AIP bảng dữ liệu(HTML) 17 Page - Renesas Technology Corp

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HIP4081A
FN3659 Rev 8.00
Page 17 of 17
September 15, 2015
Package Outline Drawing
M20.3
20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOIC)
Rev 3, 2/11
7. The lead width as measured 0.36mm (0.14 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
13.00
0.75
0.25
x 45°
0.32
0.23
MAX
8°
1.27
0.40
10.65
10.00
7.60
7.40
20
12
3
INDEX
AREA
2.65
2.35
0.30
MAX
BSC
1.27
0.35
0.49
0.25 (0.10) MC
S
B
M
A
0.10 (0.004)
0.25 (0.10) MB M
1
2
1.27 BSC
(9.40mm)
SEATING PLANE
(0.60)
(2.00)
2
20
3
3
5
7
NOTES:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimension does not include mold flash, protrusions or gate
3. Dimension does not include interlead lash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
5. Dimension is the length of terminal for soldering to a substrate.
6. Terminal numbers are shown for reference only.
8. Controlling dimension: MILLIMETER.
9. Dimensions in ( ) for reference only.
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
(0.024 inch)
10. JEDEC reference drawing number: MS-013-AC.
12.60



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