EL7566AIREZ datasheet(13/14 Pages) RENESAS

13 / 14 page

EL7566

FN7102 Rev 7.00

Page 13 of 14

May 8, 2006

For convenience, Table 3 lists the compensation values for

frequently used output voltages.

Thermal Management

The EL7566 is packaged in a thermally-efficient HTSSOP-28

package, which utilizes the exposed thermal pad at the

bottom to spread heat through PCB metal.

Therefore:

1. The thermal pad must be soldered to the PCB.

2. Maximize the PCB area.

3. If a multiple layer PCB is used, thermal vias (13 to 25 mil)

must be placed underneath the thermal pad to connect to

ground plane(s). Do not place thermal reliefs on the vias.

Figure 25 shows a typical connection.

The thermal resistance for this package is as low as 26°C/W

for 2 layer PCB of 0.39" thickness (See Figure 9). The actual

junction temperature can be measured at VTJ pin.

The thermal performance of the IC is heavily dependent on

the layout of the PCB. The user should exercise care during

the design phase to ensure the IC will operate within the

recommended environmental conditions.

Layout Considerations

The layout is very important for the converter to function

properly. Follow these tips for best performance:

1. Separate the Power Ground ( ) and Signal Ground (

);

connect them only at one point right at the SGND pin

2. Place the input capacitor(s) as close to VIN and PGND

pins as possible

3. Make as small as possible the loop from LX pins to L to

CO to PGND pins

4. Place R1 and R2 pins as close to the FB pin as possible

5. Maximize the copper area around the PGND pins; do not

place thermal relief around them

6. Thermal pad should be soldered to PCB. Place several

via holes under the chip to the ground plane to help heat

dissipation

The demo board is a good example of layout based on this

outline. Please refer to the EL7566 Application Brief.

TABLE 3. COMPENSATION VALUES

VO (V)

RC (k)CC (pF)

3.3

13.7

8200

2.5

10.5

8200

1.8

7.68

8200

1.5

6.49

8200

1.2

5.23

8200

4.42

8200

0.8

3.57

8200

GROUND PLANE

CONNECTION

COMPONENT SIDE

CONNECTION

FIGURE 25. PCB LAYOUT - 28-PIN HTSSOP PACKAGE

EL7566AIREZ bảng dữ liệu(PDF) 13 Page - Renesas Technology Corp

EL7566AIREZ bảng dữ liệu(HTML) 13 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14

bảng dữ liệu tải về

Link URL