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LTC2668 bảng dữ liệu(PDF) 37 Page - Linear Technology |
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LTC2668 bảng dữ liệu(HTML) 37 Page - Linear Technology |
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37 / 40 page ![]() LTC2348-16 37 234816fa For more information www.linear.com/LTC2348-16 To obtain the best performance from the LTC2348-16, a four-layer printed circuit board (PCB) is recommended. Layout for the PCB should ensure the digital and analog signal lines are separated as much as possible. In particu- lar, care should be taken not to run any digital clocks or signals alongside analog signals or underneath the ADC. Also minimize the length of the REFBUF to GND (Pin 20) bypass capacitor return loop, and avoid routing CNV near signals which could potentially disturb its rising edge. Supply bypass capacitors should be placed as close as possible to the supply pins. Low impedance common re- turns for these bypass capacitors are essential to the low noise operation of the ADC. A single solid ground plane is recommended for this purpose. When possible, screen the analog input traces using ground. Reference Design For a detailed look at the reference design for this con- verter, including schematics and PCB layout, please refer to DC2094A, the evaluation kit for the LTC2348-16. boarD layouT |
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