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LTC2602 bảng dữ liệu(PDF) 16 Page - Linear Technology |
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LTC2602 bảng dữ liệu(HTML) 16 Page - Linear Technology |
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16 / 26 page ![]() LTC2323-16 16 232316fc For more information www.linear.com/LTC2323-16 APPLICATIONS INFORMATION Input Filtering The noise and distortion of the buffer amplifier and signal source must be considered since they add to the ADC noise and distortion. Noisy input signals should be filtered prior to the buffer amplifier input with a low bandwidth filter to minimize noise. The simple 1-pole RC lowpass fil- ter shown in Figure 12 is sufficient for many applications. The input resistor divider network, sampling switch on- resistance (RON) and the sample capacitor (CIN) form a second lowpass filter that limits the input bandwidth to the ADC core to 110MHz. A buffer amplifier with a low noise density must be selected to minimize the degrada- tion of the SNR over this bandwidth. High quality capacitors and resistors should be used in the RC filters since these components can add distor- tion. NPO and silver mica type dielectric capacitors have excellent linearity. Carbon surface mount resistors can generate distortion from self heating and from damage that may occur during soldering. Metal film surface mount resistors are much less susceptible to both problems. ADC REFERENCE Internal Reference The LTC2323-16 has an on-chip, low noise, low drift (20ppm/°C max), temperature compensated bandgap reference. It is internally buffered and is available at REFOUT1,2 (Pins 12, 26). The reference buffer gains the internal reference voltage to 4.096V for supply volt- ages VDD = 5V and to 2.048V for VDD = 3.3V. Bypass REFOUT1,2 to REFRTN1,2 with the parallel combination of a 0.1µF (X7R, 0402 size) capacitor and a 10μF (X5R, 0805 size) ceramic capacitor to compensate the reference buffer and minimize noise. The 0.1µF capacitor should be as close as possible to the LTC2323-16 package to minimize wiring inductance. Tie the REFINT pin to VDD to enable the internal reference buffer. Table 1. REFOUT1,2 Sources and Ranges vs VDD VDD REFINT PIN REFOUT1,2 PIN DIFFERENTIAL SPAN 5V 5V Internal 4.096V ±4.096V 5V 0V External (1.25V to 5V) ±1.25V to ±5V 3.3V 3.3V Internal 2.048V ±2.048V 3.3V 0V External (1.25V to 3.3V) ±1.25V to ±3.3V 50 SINGLE-ENDED INPUT SIGNAL 232316 F12 BW = 1MHz 3.3nF SINGLE-ENDED TO DIFFERENTIAL DRIVER IN+ IN– LTC2323 Figure 12. Input Signal Chain |
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