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LTM9002 bảng dữ liệu(PDF) 8 Page - Linear Technology |
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LTM9002 bảng dữ liệu(HTML) 8 Page - Linear Technology |
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8 / 28 page ![]() LTC2158-12 8 215812fa For more information www.linear.com/LTC2158-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2158-12: Frequency Response LTC2158-12: IVDD vs Sample Rate, 15MHz Sine Wave Input, –1dBFS SAMPLE RATE (Msps) 240 280 300 320 62 186 248 260 360 340 0 124 310 215812 G19 1000 100 INPUT FREQUENCY (MHz) –4.0 –1.5 –1.0 –0.5 –2.5 –4.5 –2.0 –3.0 –3.5 215812 G20 LTC2158-12: IVDD vs Sample Rate, 15MHz Sine Wave Input, –1dBFS SAMPLE RATE (Msps) 40 50 60 50 150 200 250 30 80 70 0 100 300 215812 G18 LVDS CURRENT 3.5mA LVDS CURRENT 1.75mA PIN FUNCTIONS VDD(Pins1,2,15,16,17,64):1.8VAnalogPowerSupply. Bypass to ground with 0.1µF ceramic capacitors. Pins 1, 2, 64 can share a bypass capacitor. Pins 15, 16, 17 can share a bypass capacitor. GND (Pins 3, 6, 9, 11, 14, 18, 21, 58, Exposed Pad Pin 65): ADC Power Ground. The exposed pad must be soldered to the PCB ground. AINA+ (Pin 4): Positive Differential Analog Input for Channel A. AINA– (Pin 5): Negative Differential Analog Input for Channel A. SENSE (Pin 7): Reference Programming Pin. Connect- ing SENSE to VDD selects the internal reference and a ±0.66V input range. An external reference between 1.230V and 1.270V applied to SENSE selects an input range of ±0.528 • VSENSE. VREF (Pin 8): Reference Voltage Output. Bypass to ground with a 2.2µF ceramic capacitor. Nominally 1.25V. VCM (Pin 10): Common Mode Bias Output; nominally equal to 0.435 • VDD. VCM should be used to bias the common mode of the analog inputs. Bypass to ground with a 0.1µF ceramic capacitor. AINB– (Pin 12): Negative Differential Analog Input for Channel B. AINB+ (Pin 13): Positive Differential Analog Input for Channel B. ENC+ (Pin 19): Encode Input. Conversion starts on the rising edge. ENC– (Pin 20): Encode Complement Input. Conversion starts on the falling edge. NC (Pins 24, 25, 42, 43): Not Connected. OGND (Pins 33, 48): Output Driver Ground. OVDD (Pins 32, 49): 1.8V Output Driver Supply. Bypass eachpintogroundwithseparate0.1µFceramiccapacitors. SDO (Pin 59): Serial Interface Data Output. In serial programming mode, (PAR/SER = 0V), SDO is the optional serial interface data output. Data on SDO is read back from themodecontrolregistersandcanbelatchedonthefalling edge of SCK. SDO is an open-drain N-channel MOSFET output that requires an external 2k pull-up resistor from 1.8V to 3.3V. If readback from the mode control registers is not needed, the pull-up resistor is not necessary and SDO can be left unconnected. |
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