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LTM8045 bảng dữ liệu(PDF) 22 Page - Linear Technology |
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LTM8045 bảng dữ liệu(HTML) 22 Page - Linear Technology |
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22 / 30 page ![]() LTM4649 22 4649fc For more information www.linear.com/LTM4649 APPLICATIONS INFORMATION Figure 16. Recommended PCB Layout VOUT GND COUT CIN VIN 4649 F16 GND Layout Checklist/Example The high integration of LTM4649 makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout con- siderations are still necessary. • Use large PCB copper areas for high current path, including VIN, GND and VOUT. It helps to minimize the PCB conduction loss and thermal stress. • Place high frequency ceramic input and output capaci- tors next to the VIN, GND and VOUT pins to minimize high frequency noise. • Place a dedicated power ground layer underneath the unit. • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. • Do not put vias directly on the pads, unless they are capped. • Use a separated SGND ground copper area for com- ponents connected to signal pins. Connect the SGND to GND underneath the unit. Figure16givesagoodexampleoftherecommendedlayout. |
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